Datasheet

De Pop
GAIN
Control
Current
Limit
Charge Pump
Thermal
Limit
Left
Right
Power
Management
Current
Limit
DRV612
www.ti.com SLOS690B –DECEMBER 2010– REVISED APRIL 2011
SYSTEM BLOCK DIAGRAM
ORDERING INFORMATION
(1)
T
A
PACKAGE DESCRIPTION
DRV612PW 14-pin TSSOP
–40°C to 85°C
DRV612RGT 16-pin QFN
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
Web site at www.ti.com.
THERMAL INFORMATION
DRV612 DRV612
THERMAL METRIC
(1)
UNITS
RGT (16-Pin) PW (14-Pin)
θ
JA
Junction-to-ambient thermal resistance 52 130
θ
JCtop
Junction-to-case (top) thermal resistance 71 49
θ
JB
Junction-to-board thermal resistance 26 63
°C/W
ψ
JT
Junction-to-top characterization parameter 3.0 3.6
ψ
JB
Junction-to-board characterization parameter 26 62
θ
JCbot
Junction-to-case (bottom) thermal resistance n/a n/a
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Link(s) :DRV612