Datasheet

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SBVS070B − JUNE 2006 − REVISED MAY 2009
www.ti.com
3
ELECTRICAL CHARACTERISTICS
Boldface limits apply over the specified temperature range: T
J
= −40°C to +125°C.
At T
A
= +25°C and V
DD1
= V
DD2
= +5V with external 100kHz filter BW, and zero output current I
COMP
, unless otherwise noted.
DRV401
PARAMETER CONDITIONS MIN TYP MAX
UNITS
DIFFERENTIAL AMPLIFIER R
L
= 10kΩ to 2.5V, V
REFIN
= 2.5V
OFFSET VOLTAGE
Offset Voltage, RTO
(1)(2)
V
OS
Gain 4V/V ±0.01 ±0.1 mV
Drift, RTO
(2)
dV
OS
/dT ±0.1 ±1
(3)
µV/°C
vs Common-Mode, RTO CMRR −1V to +6V, V
REF
= 2.5V ±50 ±250 µV/V
vs Power-Supply, RTO PSRR V
REF
not included ±4 ±50 µV/V
SIGNAL INPUT
Common-Mode Voltage Range −1 (V
DD
) + 1 V
SIGNAL OUTPUT
Signal Over-Range Indication (OVER-RANGE), Delay
(2)
V
IN
= 1V Step, See Notes 2 and 3 2.5 to 3.5 µs
Voltage Output Swing From Negative Rail
(2)
,
OVER-RANGE Trip Level
I = +2.5mA, CMP Trip Level +48 +85 mV
Voltage Output Swing From Positive Rail
(2)
,
OVER-RANGE Trip Level
I = −2.5mA, CMP Trip Level V
DD
− 85 V
DD
− 48 mV
Short-Circuit Current
(2)
I
SC
V
OUT
Connected To GND −18 mA
V
OUT
Connected To V
DD
+20 mA
Gain, V
OUT
/V
IN_DIFF
4 V/V
Gain Error ±0.02 ±0.3 %
Gain Error Drift ±0.1 ppm/°C
Linearity Error R
L
= 1kΩ 10 ppm
FREQUENCY RESPONSE
Bandwidth
(2)
BW
−3dB
2 MHz
Slew Rate
(2)
SR CMVR = −1V to = +4V 6.5 V/µs
Settling Time, Large-Signal
(2)
dV ± 2V to 1%, No External Filter 0.9 µs
Settling Time
(2)
dV ± 0.4V to 0.01% 14 µs
INPUT RESISTANCE
Differential 16.5 20 23.5 kΩ
Common-Mode 41 50 59 kΩ
External Reference Input 41 50 59 kΩ
NOISE
Output Voltage Noise Density, f = 1kHz, RTO
(2)
e
n
Compensation Loop Disabled 170 nV/√Hz
COMPENSATION LOOP
DC STABILITY Probe f = 250kHz, R
LOAD
= 20Ω
Offset Error
(4)
Deviation from 50% PWM, Pin Gain = L 0.03 %
Offset Error Drift
(2)
Deviation from 50% PWM, Pin Gain = L 7.5 ppm/°C
Gain, Pin Gain = L
(2)
|V
ICOMP1
| − |V
ICOMP2
| −200 25 200 ppm/V
Power-Supply Rejection Ratio
PSRR
Probe Loop f = 250kHz
500 ppm/V
FREQUENCY RESPONSE
Open-Loop Gain, Two Modes, 7.8kHz Pin Gain H/L
24/32 dB
PROBE COIL LOOP
Input Voltage Clamp Range Field Probe Current < 50mA −0.7 to V
DD
+ 0.7 V
Internal Resistor, IS1 or IS2 to V
DD1
(2)
R
HIGH
47 59 71 Ω
Internal Resistor, IS1 or IS2 to GND1
(2)
R
LOW
60 75 90 Ω
Resistance Mismatch Between IS1 and IS2
(2)
ppm of R
HIGH
+ R
LOW
300 1500 ppm
Total Input Resistance
(3)
134 200 W
Comparator Threshold Current
(3)
22 28 34 mA
Minimum Probe Loop Half-Cycle
(2)
250 280 310 ns
Probe Loop Minimum Frequency 250 kHz
No Oscillation Detect (Error) Suppression 35 µs
COMPENSATION COIL DRIVER, H-BRIDGE
Peak Current
(2)
V
ICOMP1
− V
ICOMP2
= 4.0V
PP
250 mA
Voltage Swing 20Ω Load 4.2 V
PP
Output Common-Mode Voltage V
DD2
/2 V
Wire Break Detect, Threshold Current
(5)
I
COMP1
and I
COMP2
Railed 33 57 mA