Datasheet

REF
EXT INT
LIM
V
R = K R
I
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-
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DRV2667
www.ti.com SLOS751A –MARCH 2013–REVISED JANUARY 2014
PROGRAMMING THE BOOST CURRENT LIMIT
The peak current drawn from the supply through the inductor is set solely by the R
EXT
resistor. Note that this
peak current limit is independent of the inductance value chosen, but the inductor should be capable of handling
this programmed limit. The relationship of R
EXT
to I
LIM
is approximated by Equation 2
(2)
where K = 10500, V
REF
= 1.35 V, R
INT
= 60 Ω, and I
LIM
is the desired peak current limit through the inductor.
INDUCTOR SELECTION
Inductor selection plays a critical role in the performance of the DRV2667 . The range of recommended
inductances is from 3.3 μH to 22 μH. In general, higher inductances within a given manufacturer’s inductor series
have lower saturation current limits, and vice-versa. When a larger inductance is chosen, the device boost
converter will automatically run at a lower switching frequency and incur less switching losses; however, larger
values of inductance may have higher equivalent series resistance (ESR), which will increase the parasitic
inductor losses. Since lower values of inductance generally have higher saturation currents, they are a better
choice when attempting to maximize the output current of the boost converter.
PIEZO ACTUATOR SELECTION
There are several key specifications to consider when choosing a piezo actuator for haptics such as dimensions,
blocking force, and displacement. However, the key electrical specifications from the driver perspective are
voltage rating and capacitance. At the maximum frequency of 500 Hz, the device is optimized to drive up to 50
nF at 200 V
PP
, which is the highest voltage swing capability. It will drive larger capacitances if the programmed
boost voltage is lowered and/or the user limits the input frequency range to lower frequencies (e.g. 300 Hz).
BOOST CAPACITOR SELECTION
The boost output voltage may be programmed as high as 105 V. A capacitor with a voltage rating of at least the
boost output voltage must be selected. Since ceramic capacitors tend to come in ratings of 100 V or 250 V, a
250 V rated 100 nF capacitor of the X5R or X7R type is recommended for the 105 V case. The selected boost
capacitor should have a minimum working capacitance of at least 50 nF. For boost voltages from 30 V to 80 V, a
100 V rated or 250 V rated, 0.1 µF capacitor is acceptable. For boost voltages less than 30 V, a 50 V, 0.22 µF
capacitor is recommended.
LOW-VOLTAGE OPERATION
The lowest gain setting is optimized for 50 V
PP
with a boost voltage of 30 V. Some applications may not need 50
V
PP
, so the user may elect to program the boost converter as low as 15 V to improve efficiency. When using
boost voltages lower than 30 V, some special considerations are in order. First, to reduce boost ripple to an
acceptable level, a 50 V rated, 0.22 µF boost capacitor is recommended. Second, the maximum code range of
the digital interface will be limited. For example, the user may elect to program the boost voltage to 25 V, and
plan for a maximum drive signal of 40 V
PP
at the actuator. Any digital code given to the FIFO that is greater than
20 V
P
/25 V
P
× 127 = ±102 may induce clipping, so the user should only send digital codes between -102 and
102. Use of codes outside this range for this example may clip or drive the actuator beyond its rating.
THERMAL/LAYOUT CONSIDERATIONS
To achieve optimum device performance, use of the thermal footprint outlined by this datasheet is
recommended. See land pattern diagram for exact dimensions. The DRV2667 power pad must be soldered
directly to the thermal pad on the printed circuit board. The printed circuit board thermal pad should be
connected to the ground net with thermal vias to any existing backside/internal copper ground planes.
Connection to a ground plane on the top layer near the corners of the device is also recommended. Another key
layout consideration is to keep the boost programming resistors (R1 and R2) as close as possible to the FB pin
of the device. Care should be taken to avoid getting the FB trace near the SW trace.
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