Datasheet

StandbyShutdown
Active
EN = 0
EN = 0
EN = 1
STANDBY = 0
STANDBY = 1
DEV_RESET = 1
DRV2605
www.ti.com SLOS825C –DECEMBER 2012–REVISED SEPTEMBER 2014
Device Functional Modes (continued)
Figure 15. Power-State Transition Diagram
7.4.1.1 Operation With V
DD
< 2.5 V (Minimum V
DD
)
Operating the device with a V
DD
value below 2 V is not recommended.
7.4.1.2 Operation With V
DD
> 6 V (Absolute Maximum V
DD
)
The DRV2605 device is designed to operate at up to 5.5 V, with an absolute maximum voltage of 6 V . If
exposed to voltages above 6 V, the device can suffer permanent damage.
7.4.1.3 Operation With EN Control
The EN pin of the DRV2605 device gates the active operation. When the EN pin is logic high, the DRV2605
device is active. When the EN pin is logic low, the device enters the shutdown state, which is the lowest power
state of the device. The device registers are not reset. The EN pin operation is particularly useful for constant-
source PWM and analog input modes to maintain compatibility with non-I
2
C device signaling. The EN pin must
be high to write I
2
C device registers. However, if the EN pin is low the DRV2605 device can still acknowledge
(ACK) during an I
2
C transaction, however, no read or write is possible. To completely reset the device to the
powerup state, set the DEV_RESET bit in register 0x01.
7.4.1.4 Operation With STANDBY Control
The STANDBY bit in register 0x01 forces the device in an out of the standby state. The STANDBY bit is asserted
by default. When the STANDBY bit is asserted, the DRV2605 device goes into a low-power state. In the standby
state the device retains register values and the ability to have I
2
C communication. The properties of the standby
state also features a fast turn, wake up and play, on-time. Asserting the STANDBY bit has an immediate effect.
For example, if a waveform is played, it immediately stops when the STANDBY bit is asserted.
Clear the STANDBY bit to exit the standby state (and go to the ready state).
7.4.1.5 Operation With DEV_RESET Control
The DEV_RESET bit in register 0x01 performs the equivalent of power cycling the device. Any playback
operations are immediately interrupted, and all registers are reset to the default values. The Dev_Reset bit
automatically-clears after the reset operation is complete.
7.4.1.6 Operation in the Active State
In the active state, the DRV2605 device has I
2
C communication and is capable of playing waveforms, running
calibration, and running diagnostics. These operations are referred to as processes. Figure 16 shows the flow of
starting, or firing, a process. Notice that the GO signal fires the processes. Note that the GO signal is not the
same as the GO bit. Figure 17 shows a diagram of the GO-signal behavior.
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