Datasheet

DRV2605
www.ti.com
SLOS825B DECEMBER 2012REVISED JANUARY 2014
Control3 (Address: 0x1D)
Bit 7 6 5 4 3 2 1 0
Function NG_Thresh[1] NG_Thresh[0] ERM_OpenLoop SupplyCompDis DataFormat_RTP LRADriveMode nPWM_Analog LRA_OpenLoop
Type R/W R/W R/W R/W R/W R/W R/W R/W
Default 1 0 0 0 0 0 0 0
NG_Thresh[1:0] Noise gate threshold for PWM and analog inputs.
0: Disabled
1: 2%
2: 4% (Default)
3: 8%
ERM_OpenLoop Selects mode of operation while in ERM mode. Closed loop operation is usually desired for
its automatic overdrive and braking properties. However, many existing waveform libraries
were designed for open loop operation, so open-loop operation may be required for
compatibility.
0: Closed Loop (Default)
1: Open Loop
SupplyCompDis Disables supply compensation. The DRV2605 normally gives constant drive output over
variation in the power supply input (VDD). In some systems supply compensation may
have already been implemented upstream, so it may be useful to disable the DRV2605
supply compensation.
0: Supply Compensation Enabled (Default)
1: Supply Compensation Disabled
DataFormat_RTP Selects the input data interpretation for RTP (Real-Time Playback) mode.
0: Signed (Default)
1: Unsigned
LRADriveMode Selects the drive mode for the LRA algorithm. This determines how often the drive
amplitude is updated. Updating once per cycle gives a symmetrical output signal, while
updating twice per cycle gives more precise control.
0: Once per cycle (Default)
1: Twice per cycle
nPWM_Analog Selects input mode for the IN/TRIG pin when Mode[2:0] = 3.
0: PWM Input (Default)
1: Analog Input
LRA_OpenLoop Selects an Open Loop drive option for LRA Mode. When asserted, the playback engine
recovers the LRA commutation frequency from the PWM input, dividing it by 128; therefore,
this mode is only compatible with PWM input mode, and does not work with any other
mode. The PWM input frequency must be equal to 128 times the resonant frequency of the
LRA.
0: Auto Resonance Mode (Default)
1: Divide-by-128x Mode
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