Datasheet

9
®
DRV1100
90
80
70
60
50
40
30
20
10
0
0 0.5 1 1.5
INTERNAL TEMPERATURE RISE
OF DRV1100 IN SOIC
Temperature Rise
Load Voltage (rms)
2 2.5 3 3.5
R
L
= 15Ω
Limit at 85°C Ambient
R
L
= 100Ω
Often, the R
B
resistors will be set to a relatively high value
(> 10kΩ) to minimize quiescent current in the reference
path. If a lower input impedance is desired, additional
terminating resistors may be added to the input side of the
blocking capacitors (C
B
).
The circuit of Figure 5 may also be operated with only a
single ended input. In that case, the reference voltage on the
other input should be decoupled to ground with a 0.1µF
capacitor. In this connection, the input will generate unbal-
anced outputs. The differential output voltage will still be
3 times the input peak-to-peak voltage, but since there is
now a common-mode voltage input, there will be a common
mode voltage output. The output common-mode voltage
will be equal to the input signal’s peak-to-peak swing. This
common-mode component will reduce the available differ-
ential output voltage swing. However, if the output load has
good common-mode rejection, such as a transformer, this is
an acceptable way of using the DRV1100 with a single
ended source.
Figure 6 shows a means of translating a ground centered
single ended input to a purely differential signal for applica-
tion to DRV1100 input. This circuit uses a wideband dual op
amp in cross coupled feedback configuration.
The outputs of this circuit may then be fed into the inputs of
Figure 5. The total gain of Figure 6 is 2 • (R
F
/R
G
). The
circuit will act to hold all 4 op amp inputs equal to the
+ input of the lower op amp. Since this is at ground, the
midpoint for the input signal (where the two outputs will be
equal) is also at 0V.
FIGURE 5. AC Coupled Differential Input Interface.
DRV1100
R
L
R
B
C
B
C
B
+V
DD
V
1
V
2
R
B
R
B
R
B
FIGURE 4. Junction Temperature Rise From Ambient for
the DRV1100U.
The internal junction temperature should, in all cases, be
limited to < 150°C. For a maximum ambient temperature of
+85°C, this limits the internal temperature rise to less than
65°C. Figure 4 shows the temperature rise from ambient to
junction for loads of 15Ω and 100Ω. This shows that the
internal junction temperature will never exceed the rated
maximum for a 15Ω load.
INPUT INTERFACE CIRCUITS
Best performance with the DRV1100 is achieved with a
differential input centered at V
DD
/2. Signals that do not
require DC coupling may be connected as shown in Figure
5 through blocking caps to a midpoint reference developed
through resistor dividers from the supply voltage. The value
for the R
B
resistors determine four performance require-
ments.
• They bias the inputs at the supply midpoint.
• They provide a DC bias current path for the input to the
DRV1100
• They set the AC input impedance for the source signals to
R
B
/2.
• They set the low frequency cutoff frequency along with
C
B
.
1/2
OPA2650
V
I
R
F
R
G
500Ω
500Ω
500Ω
+ V
I
R
F
R
G
1/2
OPA2650
500Ω
– V
I
R
F
R
G
FIGURE 6. Single Ended to Differential Conversion.