Datasheet

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DP83856
6.0 Electrical Specifications (Continued)
V
IL
non-R/GMII
I
I/O
I/O_Z
Input Low
Voltage
GND 0.8 V
V
OH
non-R/GMII
O,
I/O
I/O_Z
Output High
Voltage
IO_VDD = 2.5V
IO_VDD = 3.3V
I
OH
= -4.0 mA for
both
(IO_VDD -
0.5)
IO_VDD V
V
OL
non-R/GMII
O,
I/O
I/O_Z
Output Low
Voltage
I
OL
= 4.0 mA GND 0.4 V
R strap Strap PU/PD internal
resistor value.
20 - 70 kΩ
C
IN1
I CMOS Input
Capacitance
8pF
C
OUT1
O, I/O
I/O_Z
CMOS Output
Capacitance
8pF
R
0
R/GMII O, I/O_Z Output impedance V
OUT
= IO_VDD / 2 35 Ohm
V
OD-10
(MDI) 10 M Transmit
V
DIFF
2.2 2.5 2.8 V peak
differential
V
OD-100
(MDI) 100 M Transmit
V
DIFF
Note 1 0.950 1.0 1.050 V peak
differential
V
OD-1000
(MDI) 1000 M Transmit
V
DIFF
0.67 0.745 0.82 V peak
differential
Note 1: Guaranteed by design.
Symbol Pin Types Parameter Conditions Min Typ Max Units