Datasheet

5 www.national.com
DP83865
1.0 Pin Description
The DP83865 pins are classified into the following interface
categories (each is described in the sections that follow):
— MAC Interfaces
— Management Interface
— Media Dependent Interface
—JTAG Interface
— Clock Interface
— Device Configuration and LED Interface
—Reset
— Power and Ground Pins
— Special Connect Pins
Type: I Inputs
Type: O Output
Type: O_Z Tristate Output
Type: I/O_Z Tristate Input_Output
Type: S Strapping Pin
Type: PU Internal Pull-up
Type: PD Internal Pull-down
1.1 MAC Interfaces (MII, GMII, and RGMII)
Signal Name Type
PQFP
Pin #
Description
CRS/RGMII_SEL0 O_Z,
S, PD
40 CARRIER SENSE or RGMII SELECT: CRS is asserted high to indicate the
presence of a carrier due to receive or transmit activity in Half Duplex mode.
For 10BASE-T and 100BASE-TX Full Duplex operation CRS is asserted when
a received packet is detected. This signal is not defined for 1000BASE-T Full
Duplex mode.
In RGMII mode, the CRS is not used. This pin can be used as a RGMII strap-
ping selection pin.
RGMII_SEL1
RGMII_SEL0 MAC Interface
00= GMII
01= GMII
1 0 = RGMII - HP
1 1 = RGMII - 3COM
COL/CLK_MAC_FREQ O_Z,
S, PD
39 COLLISION DETECT: Asserted high to indicate detection of a collision condi-
tion (assertion of CRS due to simultaneous transmit and receive activity) in
Half Duplex modes. This signal is not synchronous to either MII clock
(GTX_CLK, TX_CLK or RX_CLK). This signal is not defined and stays low for
Full Duplex modes.
CLOCK TO MAC FREQUENCY Select:
1 = CLOCK TO MAC output is 125 MHz
0 = CLOCK TO MAC output is 25 MHz
TX_CLK/RGMII_SEL1 O_Z,
S, PD
60 TRANSMIT CLOCK or RGMII SELECT: TX_CLK is a continuous clock signal
generated from reference CLK_IN and driven by the PHY during 10 Mbps or
100 Mbps MII mode. TX_CLK clocks the data or error out of the MAC layer and
into the PHY.
The TX_CLK clock frequency is 2.5 MHz in 10BASE-T and 25 MHz in
100BASE-TX mode.
Note: “TX_CLK” should not be confused with the “TX_TCLK” signal.
In RGMII mode, the TX_CLK is not used. This pin can be used as a RGMII
strapping selection pin. This pin should be pulled high for RGMII interface.