Datasheet
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DP83865
2.0 Register Block (Continued)
This register provides status for 1000BASE-T link.
Note: Registers 0x0B - 0x0E are Reserved by IEEE.
9 1000BASE-T
Full Duplex
STRAP[1], RW Advertise 1000BASE-T Full Duplex Capable:
1 = Advertise DTE as 1000BASE-T Full Duplex Capable.
0 = Advertise DTE as not 1000BASE-T Full Duplex Capable.
(The default value of this bit is determined by the combination of
the Duplex Enable and Speed[1:0] strap pins during reset/power-
on IF Auto-Negotiation is enabled. See register 0x04 bit 8 for de-
tails.)
8 1000BASE-T
Half Duplex
STRAP[1], RW Advertise 1000BASE-T Half Duplex Capable:
1 = Advertise DTE as 1000BASE-T Half Duplex Capable.
0 = Advertise DTE as not 1000BASE-T Half Duplex Capable.
(The default value of this bit is determined by the combination of
the Duplex Enable and Speed[1:0] strap pins during reset/power-
on IF Auto-Negotiation is enabled. See register 0x04 bit 8 for de-
tails.)
7:0 Reserved 0, RW Reserved by IEEE: Writes ignored, Read as 0.
Table 13. 1000BASE-T Status Register (1KSTSR) address 0x0A (10’d)
Bit Bit Name Default Description
15 Master / Slave
Manual Config. Fault
0, RO, LH, SC MASTER / SLAVE manual configuration fault detected:
1 = MASTER/SLAVE manual configuration fault detected.
0 = No MASTER/SLAVE manual configuration fault detected.
14 Master / Slave
Config. Resolution
0, RO MASTER / SLAVE Configuration Results:
1 = Configuration resolved to MASTER.
0 = Configuration resolved to SLAVE.
13 Local Receiver
Status
0, RO Local Receiver Status:
1 = OK.
0 = Not OK.
12 Remote Receiver
Status
0, RO Remote Receiver Status:
1 = OK.
0 = Not OK.
11 LP 1000BASE-T
Full Duplex
0, RO Link Partner 1000BASE-T Full Duplex:
1 = Link Partner capable of 1000BASE-T Full Duplex.
0 = Link Partner not capable of 1000BASE-T Full Duplex.
10 LP 1000BASE-T
Half Duplex
0, RO Link Partner 1000BASE-T Half Duplex:
1 = Link Partner capable of 1000BASE-T Half Duplex.
0 = Link Partner not capable of 1000BASE-T Half Duplex.
9:8 Reserved 0, RO Reserved by IEEE: Write ignored, read as 0.
7:0 IDLE ErrorCount[7:0] 0, RO, SC IDLE Error Count
Table 12. 1000BASE-T Control Register (1KTCR) address 0x09
Bit Bit Name Default Description