Datasheet

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DP83865
2.0 Register Block (Continued)
The PHY Identifier Registers #1 and #2 together form a unique identifier for the DP83865. The Identifier consists of a con-
catenation of the Organizationally Unique Identifier (OUI), the vendor’s model number and the model revision number. A
PHY may return a value of zero in each of the 32 bits of the PHY Identifier if desired. The PHY Identifier is intended to sup-
port network management. National’s IEEE assigned OUI is 0x080017h.
Table 5. PHY Identifier Register #1 (PHYIDR1) address 0x02
Bit Bit Name Default Description
15:0 OUI[3:18] 16’b<0010_0000
_0000_0000>, P
OUI Bits 3:18:
Bits 3 to 18 of the OUI (0x080017h) are stored in bits 15 to 0 of
this register. The most significant two bits of the OUI are ignored
(the IEEE standard refers to these as bits 1 and 2).
Table 6. PHY Identifier Register #2 (PHYIDR2) address 0x03
Bit Bit Name Default Description
15:10 OUI[19:24] 6’b<01_0111>, P OUI Bits 19:24:
Bits 19 to 24 of the OUI (0x080017h) are mapped to bits 15 to 10
of this register respectively.
9:4 VNDR_MDL[5:0] 6’b <00_0111>,
P
Vendor Model Number:
The six bits of vendor model number are mapped to bits 9 to 4
(most significant bit to bit 9).
3:0 MDL_REV[3:0] 4’b <1010>, P Model Revision Number:
Four bits of the vendor model revision number are mapped to bits
3 to 0 (most significant bit to bit 3). This field will be incremented
for all major device changes.
Table 7. Auto-Negotiation Advertisement Register (ANAR) address 0x04
Bit Bit Name Default Description
15 NP 0, RW Next Page Indication:
1 = Next Page Transfer desired.
0 = Next Page Transfer not desired.
14 Reserved 0, RO Reserved by IEEE: Writes ignored, Read as 0.
13 RF 0, RW Remote Fault:
1 = Advertises that this device has detected a Remote Fault.
0 = No Remote Fault detected.
12 Reserved 0, RO Reserved for Future IEEE use: Write as 0, Read as 0.
11 ASY_PAUSE 0, RW Asymmetrical PAUSE:
1 = MAC/Controller supports Asymmetrical Pause direction.
0 = MAC/Controller does not support Asymmetrical Pause direc-
tion.
10 PAUSE 0, RW PAUSE:
1 = MAC/Controller supports Pause frames.
0 = MAC/Controller does not support Pause frames.
9 100BASE-T4 0, RO 100BASE-T4 Support:
1 = 100BASE-T4 supported.
0 = No support for 100BASE-T4.
DP83865 does not support 100BASE-T4 mode and this bit
should always be read back as “0”.