Datasheet

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DP83865

2.0 Register Block

2.1 Register Definitions

Table 2. Register Block - DP83865 Register Map

Offset

Access Tag Description

Hex Decimal

0x00 0 RW BMCR Basic Mode Control Register

0x01 1 RO BMSR Basic Mode Status Register

0x02 2 RO PHYIDR1 PHY Identifier Register #1

0x03 3 RO PHYIDR2 PHY Identifier Register #2

0x04 4 RW ANAR Auto-Negotiation Advertisement Register

0x05 5 RW ANLPAR Auto-Negotiation Link Partner Ability Register

0x06 6 RW ANER Auto-Negotiation Expansion Register

0x07 7 RW ANNPTR Auto-Negotiation Next Page TX

0x08 8 RW ANNPRR Auto-Negotiation Next Page RX

0x09 9 RW 1KTCR 1000BASE-T Control Register

0x0A 10 RO 1KSTSR 1000BASE-T Status Register

0x0B-0x0E 11-14 RO Reserved Reserved

0x0F 15 RO 1KSCR 1000BASE-T Extended Status Register

0x10 16 RO STRAP_REG Strap Options Register

0x11 17 RO LINK_AN Link and Auto-Negotiation Status Register

0x12 18 RW AUX_CTRL Auxiliary Control Register

0x13 19 RW LED_CTRL LED Control Register

0x14 20 RO INT_STATUS Interrupt Status Register

0x15 21 RW INT_MASK Interrupt Mask Register

0x16 22 RO EXP_MEM_CTL Expanded Memory Access Control

0x17 23 RW INT_CLEAR Interrupt Clear Register

0x18 24 RW BIST_CNT BIST Counter Register

0x19 25 RW BIST_CFG1 BIST Configuration Register #1

0x1A 26 RW BIST_CFG2 BIST Configuration Register #2

0x1B-0x1C 27-28 RO Reserved Reserved

0x1D 29 RW EXP_MEM_DATA Expanded Memory Data

0x1E 30 RW EXP_MEM_ADDR Expanded Memory Address

0x1F 31 RW PHY_SUP PHY Support Register