Datasheet

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DP83865
1.0 Pin Description (Continued)
1.8 Power and Ground Pins
(See section “5.3 Power Supply Decoupling” on page 64.)
1.9 Special Connect Pins
Signal Name PQFP Pin # Description
IO_VDD 4, 15, 21, 29, 37, 42, 53, 58, 69,
77, 83, 90
2.5V or 3.3V I/O Supply for “MAC Interfaces”, “Management
Interface”, “JTAG Interface”, “Clock Interface”, “Device Con-
figuration and LED Interface” and “Reset”.
CORE_VDD 11, 19, 25, 35, 48, 63, 73, 92 1.8V Digital Core Supply
2V5_AVDD1 101 2.5V Analog Supply
2V5_AVDD2 96 2.5V Analog Supply
1V8_AVDD1 103, 105, 111, 117, 123 1.8V Analog Supply
1V8_AVDD2 98 1.8V Analog Supply - See section “5.4 Sensitive Supply
Pins” on page 64 for low pass filter recommendation.
1V8_AVDD3 100 1.8V Analog Supply - See section “5.4 Sensitive Supply
Pins” on page 64 for low pass filter recommendation.
VSS 5, 12, 16, 20, 22, 26, 30, 36, 38,
43, 49, 54, 59, 64, 70, 74, 78, 82,
91, 93, 97, 99, 104, 106, 107,
110, 112, 113, 116, 118, 119,
122, 124, 125, 128
Ground
Signal Name TYPE
PQFP
Pin #
Description
BG_REF I 102 Internal Reference Bias: See section “5.4 Sensitive Supply Pins” on page 64
for information on how to terminate this pin.
RESERVED 2, 23,
84
These pins are reserved and must be left floating.