Datasheet

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DP83849I
AN_EN
(LED_ACT/LED_COL_A)
AN1_A (LED_SPEED_A)
AN0_A (LED_LINK_A)
AN_EN
(LED_ACT/LED_COL_B)
AN1_B (LED_SPEED_B)
AN0_B (LED_LINK_B)
S, O, PU 21
20
19
41
42
43
Auto-Negotiation Enable: When high, this enables Auto-Negoti-
ation with the capability set by AN0 and AN1 pins. When low, this
puts the part into Forced Mode with the capability set by AN0 and
AN1 pins.
AN0 / AN1: These input pins control the forced or advertised op-
erating mode of the DP83849I according to the following table.
The value on these pins is set by connecting the input pins to
GND (0) or V
CC
(1) through 2.2 kΩ resistors. These pins should
NEVER be connected directly to GND or VCC.
The value set at this input is latched into the DP83849I at Hard-
ware-Reset.
The float/pull-down status of these pins are latched into the Basic
Mode Control Register and the Auto_Negotiation Advertisement
Register during Hardware-Reset.
The default is 111 since these pins have internal pull-ups.
MII_MODE_A (RX_DV_A)
SNI_MODE_A (TXD3_A)
MII_MODE_B (RX_DV_B)
SNI_MODE_B (TXD3_B)
S, O, PD 80
17
62
45
MII MODE SELECT: This strapping option pair determines the
operating mode of the MAC Data Interface. Default operation
(No pull-ups) will enable normal MII Mode of operation. Strapping
MII_MODE high will cause the device to be in RMII or SNI modes
of operation, determined by the status of the SNI_MODE strap.
Since the pins include internal pull-downs, the default values are
0. Both MAC Data Interfaces must have their RMII Mode settings
the same, i.e. both in RMII mode or both not in RMII mode.
The following table details the configurations:
LED_CFG_A
(CRS_A/CRS_DV_A)
LED_CFG_B
(CRS_B/CRS_DV_B)
S, O, PU 1
61
LED CONFIGURATION: This strapping option determines the
mode of operation of the LED pins. Default is Mode 1. Mode 1 and
Mode 2 can be controlled via the strap option. All modes are con
-
figurable via register access.
See Tabl e 3 on page 21 for LED Mode Selection.
Signal Name Type Pin # Description
AN_EN AN1 AN0 Forced Mode
0 0 0 10BASE-T, Half-Duplex
0 0 1 10BASE-T, Full-Duplex
0 1 0 100BASE-TX, Half-Duplex
0 1 1 100BASE-TX, Full-Duplex
AN_EN AN1 AN0 Advertised Mode
1 0 0 10BASE-T, Half/Full-Duplex
1 0 1 100BASE-TX, Half/Full-Duplex
1 1 0 10BASE-T Half-Duplex
100BASE-TX, Half-Duplex
1 1 1 10BASE-T, Half/Full-Duplex
100BASE-TX, Half/Full-Duplex
MII_MODE SNI_MODE MAC Interface Mode
0 X MII Mode
1 0 RMII Mode
1 1 10 Mb SNI Mode