Datasheet

X1 X2
R1
CL2CL1
DP83849IF
www.ti.com SNOSAX8D –JUNE 2009–REVISED APRIL 2013
8.4 CLOCK IN (X1) REQUIREMENTS
The DP83849IF supports an external CMOS level oscillator source or a crystal resonator device.
Oscillator
If an external clock source is used, X1 should be tied to the clock source and X2 should be left floating.
Specifications for CMOS oscillators: 25 MHz in MII Mode and 50 MHz in RMII Mode are listed in Table 8-1
and Table 8-2.
Crystal
A 25 MHz, parallel, 20 pF load crystal resonator should be used if a crystal source is desired. Figure 8-3
shows a typical connection for a crystal resonator circuit. The load capacitor values will vary with the
crystal vendors; check with the vendor for the recommended loads.
The oscillator circuit is designed to drive a parallel resonance AT cut crystal with a minimum drive level of
100mW and a maximum of 500 µW. If a crystal is specified for a lower drive level, a current limiting
resistor should be placed in series between X2 and the crystal.
As a starting point for evaluating an oscillator circuit, if the requirements for the crystal are not known, C
L1
and C
L2
should be set at 33 pF, and R
1
should be set at 0Ω.
Specification for 25 MHz crystal are listed in Table 8-3.
Figure 8-3. Crystal Oscillator Circuit
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