Datasheet

PMD Input
Pair
SD+ internal
T2.23.1 T2.23.2
T.2.22.2
T2.22.1
Fast Link
Pulse(s)
T2.22.1
T2.22.3
clock
pulse
data
pulse
clock
pulse
FLP Burst FLP Burst
T2.22.5
T2.22.4
T2.21.2
T2.21.1
Normal Link
Pulse(s)
DP83849IF
www.ti.com SNOSAX8D –JUNE 2009–REVISED APRIL 2013
4.25 AC Specifications — 10BASE-T Normal Link Pulse Timing
(1)
Parameter Description Notes Min Typ Max Units
T2.21.1 Pulse Width 100 ns
T2.21.2 Pulse Period 16 ms
(1) These specifications represent transmit timings.
4.26 AC Specifications — Auto-Negotiation Fast Link Pulse (FLP) Timing
(1)
Parameter Description Notes Min Typ Max Units
T2.22.1 Clock, Data Pulse Width 100 ns
T2.22.2 Clock Pulse to Clock Pulse 125 µs
Period
T2.22.3 Clock Pulse to Data Pulse Data = 1 62 µs
Period
T2.22.4 Burst Width 2 ms
T2.22.5 FLP Burst to FLP Burst Period 16 ms
(1) These specifications represent transmit timings.
4.27 AC Specifications — 100BASE-TX Signal Detect Timing
(1)
Parameter Description Notes Min Typ Max Units
T2.23.1 SD Internal Turn-on Time 1 ms
T2.23.2 SD Internal Turn-off Time 350 µs
(1) The signal amplitude on PMD Input Pair must be TP-PMD compliant.
Copyright © 2009–2013, Texas Instruments Incorporated Electrical Specifications 25
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