Datasheet

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DP83849ID
4.2.7 Descrambler
A serial descrambler is used to de-scramble the received
NRZ data. The descrambler has to generate an identical
data scrambling sequence (N) in order to recover the origi
-
nal unscrambled data (UD) from the scrambled data (SD)
as represented in the equations:
Synchronization of the descrambler to the original scram-
bling sequence (N) is achieved based on the knowledge
that the incoming scrambled data stream consists of
scrambled IDLE data. After the descrambler has recog
-
nized 12 consecutive IDLE code-groups, where an
unscrambled IDLE code-group in 5B NRZ is equal to five
consecutive ones (11111), it will synchronize to the receive
data stream and generate unscrambled data in the form of
unaligned 5B code-groups.
In order to maintain synchronization, the descrambler must
continuously monitor the validity of the unscrambled data
that it generates. To ensure this, a line state monitor and a
hold timer are used to constantly monitor the synchroniza
-
tion status. Upon synchronization of the descrambler the
hold timer starts a 722 µs countdown. Upon detection of
sufficient IDLE code-groups (58 bit times) within the 722
µs
period, the hold timer will reset and begin a new count
-
down. This monitoring operation will continue indefinitely
given a properly operating network connection with good
signal integrity. If the line state monitor does not recognize
sufficient unscrambled IDLE code-groups within the 722
µs
period, the entire descrambler will be forced out of the cur
-
rent state of synchronization and reset in order to re-
acquire synchronization.
4.2.8 Code-group Alignment
The code-group alignment module operates on unaligned
5-bit data from the descrambler (or, if the descrambler is
bypassed, directly from the NRZI/NRZ decoder) and con
-
verts it into 5B code-group data (5 bits). Code-group align-
ment occurs after the J/K code-group pair is detected.
Once the J/K code-group pair (11000 10001) is detected,
subsequent data is aligned on a fixed boundary.
4.2.9 4B/5B Decoder
The code-group decoder functions as a look up table that
translates incoming 5B code-groups into 4B nibbles. The
code-group decoder first detects the J/K code-group pair
preceded by IDLE code-groups and replaces the J/K with
MAC preamble. Specifically, the J/K 10-bit code-group pair
is replaced by the nibble pair (0101 0101). All subsequent
5B code-groups are converted to the corresponding 4B
nibbles for the duration of the entire packet. This conver
-
sion ceases upon the detection of the T/R code-group pair
denoting the End of Stream Delimiter (ESD) or with the
reception of a minimum of two IDLE code-groups.
4.2.10 100BASE-TX Link Integrity Monitor
The 100 Base TX Link monitor ensures that a valid and sta-
ble link is established before enabling both the Transmit
and Receive PCS layer.
Signal detect must be valid for 395us to allow the link mon-
itor to enter the 'Link Up' state, and enable the transmit and
receive functions.
4.2.11 Bad SSD Detection
A Bad Start of Stream Delimiter (Bad SSD) is any transition
from consecutive idle code-groups to non-idle code-groups
which is not prefixed by the code-group pair /J/K.
If this condition is detected, the DP83849ID will assert
RX_ER and present RXD[3:0] = 1110 to the MII for the
cycles that correspond to received 5B code-groups until at
least two IDLE code groups are detected. In addition, the
False Carrier Sense Counter register (FCSCR) will be
incremented by one.
Once at least two IDLE code groups are detected, RX_ER
and CRS become de-asserted.
4.3 100BASE-FX Operation
The DP83849ID provides IEEE 802.3 compliant 100BASE-
FX operation. Configuration of FX mode is via strap option,
or through the register interface.
4.3.1 100BASE-FX Transmit
In 100BASE-FX mode, the device Transmit Pins connect to
an industry standard Fiber Transceiver with PECL signal-
ling through a capacitively coupled circuit.
In FX mode, the device bypasses the Scrambler and the
MLT3 encoder. This allows for the transmission of serial
-
ized 5B4B encoded NRZI data at 125MHz.
The only added functionality from 100BASE-TX is the sup-
port for Far-End Fault data generation.
4.3.2 100BASE-FX Receive
In 100BASE-FX mode, the device Receive pins connect to
an industry standard Fiber Transceiver with PECL signal
-
ling through a capacitively coupled circuit.
In FX mode, the device bypasses MLT3 Decoder and the
Descrambler. This allows for the reception of serialized
5B4B encoded NRZI data at 125MHz.
The only added functionality for 100BASE-FX from
100BASE-TX is the support of Far-End Fault detection.
UD SD N⊕()=
SD UD N⊕()=