Datasheet
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DP83849ID
FX_EN_A (COL_A)
FX_EN_B (COL_B)
AN_EN
(LED_ACT/LED_COL_A)
AN1_A (LED_SPEED_A)
AN0_A (LED_LINK_A)
AN_EN
(LED_ACT/LED_COL_B)
AN1_B (LED_SPEED_B)
AN0_B (LED_LINK_B)
S, I, PD
S, O, PU
3
59
21
20
19
41
42
43
FX ENABLE: Default is to disable 100BASE-FX (Fiber) mode.
This strapping option enables 100BASE-FX. An external pull-up
will enable 100BASE-FX mode.
Auto-Negotiation Enable: When high, this enables Auto-Negoti-
ation with the capability set by AN0 and AN1 pins. When low, this
puts the part into Forced Mode with the capability set by AN0 and
AN1 pins.
AN0 / AN1: These input pins control the forced or advertised oper-
ating mode of the DP83849ID according to the following table. The
value on these pins is set by connecting the input pins to GND (0)
or V
CC
(1) through 2.2 kΩ resistors. These pins should NEVER
be connected directly to GND or VCC.
Fiber Mode Duplex Selection: If Fiber mode is strapped using the
FX_EN pin, the AN0 strap value is used to select Half or Full Du
-
plex. AN_EN and AN1are ignored if FX_EN is asserted, since Fi-
ber mode is 100Mb only and does not support Auto-Negotiation.
The value set at this input is latched into the DP83849ID at Hard-
ware-Reset.
The float/pull-down status of these pins are latched into the Basic
Mode Control Register and the Auto_Negotiation Advertisement
Register during Hardware-Reset.
The default is 0111 since the FX_EN pin has an internal pull-down
and the Auto-Negotiation pins have internal pull-ups.
Signal Name Type Pin # Description
FX_EN AN_EN AN1 AN0 Forced Mode
0 0 0 0 10BASE-T, Half-Duplex
0 0 0 1 10BASE-T, Full-Duplex
0 0 1 0 100BASE-TX, Half-Duplex
0 0 1 1 100BASE-TX, Full-Duplex
1 X X 0 100BASE-FX, Half-Duplex
1 X X 1 100BASE-FX, Full-Duplex
FX_EN AN_EN AN1 AN0 Advertised Mode
0 1 0 0 10BASE-T, Half/Full-Duplex
0 1 0 1 100BASE-TX, Half/Full-Duplex
0 1 1 0 10BASE-T Half-Duplex
100BASE-TX, Half-Duplex
0 1 1 1 10BASE-T, Half/Full-Duplex
100BASE-TX, Half/Full-Duplex