Datasheet

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DP83848YB
SERIAL
MANAGEMEN
TX_CLK TXD[3:0] TX_EN MDIO MDC COL CRS/CRS_DV RX_ER RX_DV RXD[3:0] RX_CLK
Auto-Negotiation
State Machine
Clock
RX_DATA
RX_CLK
TX_DATA TX_CLK
REFERENCE CLOCK
TD±
RD±
LEDS
Generation
MII/RMII/SNI INTERFACES
MII
Registers
Transmit
Block
10BASE-T &
100BASE-TX
10BASE-T &
100BASE-TX
Receive
Block
Auto-MDIX
Boundary
Scan
DAC
ADC
JTAG
LED
Drivers
MII/RMII/SNI