Datasheet

DP83848VYB
www.ti.com SNLS266D –MAY 2007–REVISED APRIL 2013
Signal Name Type Pin # Description
COL S, O, PU 42 MII COLLISION DETECT: Asserted high to indicate detection of a collision condition
(simultaneous transmit and receive activity) in 10 Mb/s and 100 Mb/s Half Duplex Modes.
While in 10BASE-T Half Duplex mode with heartbeat enabled this pin is also asserted for a
duration of approximately 1µs at the end of transmission to indicate heartbeat (SQE test).
In Full Duplex Mode, for 10 Mb/s or 100 Mb/s operation, this signal is always logic 0. There is no
heartbeat function during 10 Mb/s full duplex operation.
RMII COLLISION DETECT: Per the RMII Specification, no COL signal is required. The MAC will
recover CRS from the CRS_DV signal and use that along with its TX_EN signal to determine
collision.
SNI COLLISION DETECT: Asserted high to indicate detection of a collision condition
(simultaneous transmit and receive activity) in 10 Mb/s SNI mode.
3.5 CLOCK INTERFACE
Signal Name Type Pin # Description
X1 I 34 CRYSTAL/OSCILLATOR INPUT: This pin is the primary clock reference input for the
DP83848VYB and must be connected to a 25 MHz 0.005% (±50 ppm) clock source. The
DP83848VYB supports either an external crystal resonator connected across pins X1 and X2,
or an external CMOS-level oscillator source connected to pin X1 only.
RMII REFERENCE CLOCK: This pin is the primary clock reference input for the RMII mode
and must be connected to a 50 MHz 0.005% (±50 ppm) CMOS-level oscillator source.
X2 O 33 CRYSTAL OUTPUT: This pin is the primary clock reference output to connect to an external
25 MHz crystal resonator device. This pin must be left unconnected if an external CMOS
oscillator clock source is used.
25MHz_OUT O 25 25 MHz CLOCK OUTPUT:
In MII mode, this pin provides a 25 MHz clock output to the system.
In RMII mode, this pin provides a 50 MHz clock output to the system.
This allows other devices to use the reference clock from the DP83848VYB without requiring
additional clock sources.
3.6 LED INTERFACE
See Table 5-3 for LED Mode Selection.
Signal Name Type Pin # Description
LED_LINK S, O, PU 28 LINK LED: In Mode 1, this pin indicates the status of the LINK. The LED will be
ON when Link is good.
LINK/ACT LED: In Mode 2 and Mode 3, this pin indicates transmit and receive
activity in addition to the status of the Link. The LED will be ON when Link is
good. It will blink when the transmitter or receiver is active.
LED_SPEED S, O, PU 27 SPEED LED: The LED is ON when device is in 100 Mb/s and OFF when in 10
Mb/s. Functionality of this LED is independent of mode selected.
LED_ACT/COL S, O, PU 26 ACTIVITY LED: In Mode 1, this pin is the Activity LED which is ON when activity
is present on either Transmit or Receive.
COLLISION/DUPLEX LED: In Mode 2, this pin by default indicates Collision
detection. For Mode 3, this LED output may be programmed to indicate Full-
duplex status instead of Collision.
3.7 JTAG INTERFACE
Signal Name Type Pin # Description
TCK I, PU 8 TEST CLOCK
This pin has a weak internal pullup.
TDI I, PU 12 TEST DATA INPUT
This pin has a weak internal pullup.
TDO O 9 TEST OUTPUT
TMS I, PU 10 TEST MODE SELECT
This pin has a weak internal pullup.
TRST# I, PU 11 TEST RESET: Active low asynchronous test reset.
This pin has a weak internal pullup.
Copyright © 2007–2013, Texas Instruments Incorporated Pin Descriptions 9
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