Datasheet

DP83848VYB
www.ti.com SNLS266D –MAY 2007–REVISED APRIL 2013
8 Reset Operation
The DP83848VYB includes an internal power-on reset (POR) function and does not need to be explicitly
reset for normal operation after power up. If required during normal operation, the device can be reset by
a hardware or software reset.
8.1 HARDWARE RESET
A hardware reset is accomplished by applying a low pulse (TTL level), with a duration of at least 1 µs, to
the RESET_N pin. This will reset the device such that all registers will be reinitialized to default values and
the hardware configuration values will be re-latched into the device (similar to the power-up/reset
operation).
8.2 SOFTWARE RESET
A software reset is accomplished by setting the reset bit (bit 15) of the Basic Mode Control Register
(BMCR). The period from the point in time when the reset bit is set to the point in time when software
reset has concluded is approximately 1 µs.
A software reset will reset the device such that all registers will be reset to default values and the
hardware configuration values will be maintained. Software driver code must wait 3 µs following a software
reset before allowing further serial MII operations with the DP83848VYB.
Copyright © 2007–2013, Texas Instruments Incorporated Reset Operation 51
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