Datasheet

DP83848VYB
www.ti.com SNLS266D –MAY 2007–REVISED APRIL 2013
7 Architecture
This section describes the operations within each transceiver module, 100BASE-TX and 10BASE-T. Each
operation consists of several functional blocks and described in the following:
— 100BASE-TX Transmitter
— 100BASE-TX Receiver
— 10BASE-T Transceiver Module
7.1 100BASE-TX TRANSMITTER
The 100BASE-TX transmitter consists of several functional blocks which convert synchronous 4-bit nibble
data, as provided by the MII, to a scrambled MLT-3 125 Mb/s serial data stream. Because the 100BASE-
TX TP-PMD is integrated, the differential output pins, PMD Output Pair, can be directly routed to the
magnetics.
The block diagram in Figure 7-1. provides an overview of each functional block within the 100BASE-TX
transmit section.
The Transmitter section consists of the following functional blocks:
— Code-group Encoder and Injection block
— Scrambler block (bypass option)
— NRZ to NRZI encoder block
— Binary to MLT-3 converter / Common Driver
The bypass option for the functional blocks within the 100BASE-TX transmitter provides flexibility for
applications where data conversion is not always required. The DP83848VYB implements the 100BASE-
TX transmit state machine diagram as specified in the IEEE 802.3u Standard, Clause 24.
Figure 7-1. 100BASE-TX Transmit Block Diagram
Copyright © 2007–2013, Texas Instruments Incorporated Architecture 41
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