Datasheet

DP83848VYB
SNLS266D –MAY 2007–REVISED APRIL 2013 www.ti.com
The DP83848VYB waits until it has received this preamble sequence before responding to any other
transaction. Once the DP83848VYB serial management port has been initialized no further preamble
sequencing is required until after a power-on/reset, invalid Start, invalid Opcode, or invalid turnaround bit
has occurred.
The Start code is indicated by a <01> pattern. This assures the MDIO line transitions from the default idle
line state.
Turnaround is defined as an idle bit time inserted between the Register Address field and the Data field.
To avoid contention during a read transaction, no device shall actively drive the MDIO signal during the
first bit of Turnaround. The addressed DP83848VYB drives the MDIO with a zero for the second bit of
turnaround and follows this with the required data. Figure 6-1 shows the timing relationship between MDC
and the MDIO as driven/received by the Station (STA) and the DP83848VYB (PHY) for a typical register
read access.
For write transactions, the station management entity writes data to the addressed DP83848VYB thus
eliminating the requirement for MDIO Turnaround. The Turnaround time is filled by the management entity
by inserting <10>. Figure 6-2 shows the timing relationship for a typical MII register write access.
Figure 6-1. Typical MDC/MDIO Read Operation
Figure 6-2. Typical MDC/MDIO Write Operation
6.4.3 Serial Management Preamble Suppression
The DP83848VYB supports a Preamble Suppression mode as indicated by a one in bit 6 of the Basic
Mode Status Register (BMSR, address 01h.) If the station management entity (i.e. MAC or other
management controller) determines that all PHYs in the system support Preamble Suppression by
returning a one in this bit, then the station management entity need not generate preamble for each
management transaction.
The DP83848VYB requires a single initialization sequence of 32 bits of preamble following
hardware/software reset. This requirement is generally met by the mandatory pull-up resistor on MDIO in
conjunction with a continuous MDC, or the management access made to determine whether Preamble
Suppression is supported.
While the DP83848VYB requires an initial preamble sequence of 32 bits for management initialization, it
does not require a full 32-bit sequence between each subsequent transaction. A minimum of one idle bit
between management transactions is required as specified in the IEEE 802.3u specification.
40 Functional Description Copyright © 2007–2013, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: DP83848VYB