Datasheet

DP83848VYB
www.ti.com
SNLS266D MAY 2007REVISED APRIL 2013
Refer to Figure 5-2 for an example of AN connections to external components. In this example, the AN
strapping results in Auto-Negotiation disabled with 10/100 Half/Full-Duplex advertised .
The adaptive nature of the LED outputs helps to simplify potential implementation issues of these dual
purpose pins.
Figure 5-2. AN Strapping and LED Loading Example
5.4.2 LED Direct Control
The DP83848VYB provides another option to directly control any or all LED outputs through the LED
Direct Control Register (LEDCR), address 18h. The register does not provide read access to LEDs.
5.5 HALF DUPLEX vs. FULL DUPLEX
The DP83848VYB supports both half and full duplex operation at both 10 Mb/s and 100 Mb/s speeds.
Half-duplex relies on the CSMA/CD protocol to handle collisions and network access. In Half-Duplex
mode, CRS responds to both transmit and receive activity in order to maintain compliance with the IEEE
802.3 specification.
Since the DP83848VYB is designed to support simultaneous transmit and receive activity it is capable of
supporting full-duplex switched applications with a throughput of up to 200 Mb/s per port when operating
in either 100BASE-TX or 100BASE-FX. Because the CSMA/CD protocol does not apply to full-duplex
operation, the DP83848VYB disables its own internal collision sensing and reporting functions and
modifies the behavior of Carrier Sense (CRS) such that it indicates only receive activity. This allows a full-
duplex capable MAC to operate properly.
All modes of operation (100BASE-TX, and 10BASE-T) can run either half-duplex or full-duplex.
Additionally, other than CRS and Collision reporting, all remaining MII signaling remains the same
regardless of the selected duplex mode.
It is important to understand that while Auto-Negotiation with the use of Fast Link Pulse code words can
interpret and configure to full-duplex operation, parallel detection can not recognize the difference between
full and half-duplex from a fixed 10 Mb/s or 100 Mb/s link partner over twisted pair. As specified in the
802.3u specification, if a far-end link partner is configured to a forced full duplex 100BASE-TX ability, the
parallel detection state machine in the partner would be unable to detect the full duplex capability of the
far-end link partner. This link segment would negotiate to a half duplex 100BASE-TX configuration (same
scenario for 10 Mb/s).
Copyright © 2007–2013, Texas Instruments Incorporated Configuration 35
Submit Documentation Feedback
Product Folder Links: DP83848VYB