Datasheet

T2.15.1
T2.15.2
TX_CLK
TX_EN
TXD
PMD Output
Pair
DP83848VYB
SNLS266D –MAY 2007–REVISED APRIL 2013 www.ti.com
4.18 AC Specifications — 10BASE-T Transmit Timing (Start of Packet)
Parameter Description Notes Min Typ Max Units
T2.15.1 Transmit Output Delay from the 10 Mb/s MII mode
(1)
3.5 bits
Falling Edge of TX_CLK
T2.15.2 Transmit Output Delay from the 10 Mb/s Serial mode
(1)
3.5 bits
Rising Edge of TX_CLK
(1) 1 bit time = 100 ns in 10 Mb/s.
4.19 AC Specifications — 10BASE-T Transmit Timing (End of Packet)
Parameter Description Notes Min Typ Max Units
T2.16.1 End of Packet High Time 250 300 ns
(with '0' ending bit)
T2.16.2 End of Packet High Time 250 300 ns
(with '1' ending bit)
22 Electrical Specifications Copyright © 2007–2013, Texas Instruments Incorporated
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