Datasheet

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DP83848C
3.4.3 Serial Management Preamble Suppression
The DP83848C supports a Preamble Suppression mode
as indicated by a one in bit 6 of the Basic Mode Status
Register (BMSR, address 01h.) If the station management
entity (i.e. MAC or other management controller) deter
-
mines that all PHYs in the system support Preamble Sup-
pression by returning a one in this bit, then the station
management entity need not generate preamble for each
management transaction.
The DP83848C requires a single initialization sequence of
32 bits of preamble following hardware/software reset. This
requirement is generally met by the mandatory pull-up
resistor on MDIO in conjunction with a continuous MDC, or
the management access made to determine whether Pre
-
amble Suppression is supported.
While the DP83848C requires an initial preamble
sequence of 32 bits for management initialization, it does
not require a full 32-bit sequence between each subse
-
quent transaction. A minimum of one idle bit between man-
agement transactions is required as specified in the IEEE
802.3u specification.
Table 5. Typical MDIO Frame Format
MII Management
Serial Protocol
<idle><start><op code><device addr><reg addr><turnaround><data><idle>
Read Operation <idle><01><10><AAAAA><RRRRR><Z0><xxxx xxxx xxxx xxxx><idle>
Write Operation <idle><01><01><AAAAA><RRRRR><10><xxxx xxxx xxxx xxxx><idle>
Figure 4. Typical MDC/MDIO Read Operation
Figure 5. Typical MDC/MDIO Write Operation
MDC
MDIO
00011 110000000
(STA)
Idle Start
Opcode
(Read)
PHY Address
(PHYAD = 0Ch)
Register Address
(00h = BMCR)
TA
Register Data
Z
MDIO
(PHY)
Z
Z
Z
0 0 011000100000000
Z
Idle
Z
Z
MDC
MDIO
00011110000000
(STA)
Idle Start
Opcode
(Write)
PHY Address
(PHYAD = 0Ch)
Register Address
(00h = BMCR)
TA
Register Data
Z
0 0 0 000 00000000
Z
Idle
1000
ZZ