Datasheet

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DP83847
Figure 7. Receive Block Diagram
4B/5B DECODER
DESCRAMBLER
DIGITAL
ADAPTIVE
EQUALIZATION
MLT-3 TO
BINARY
DECODER
RD±
RX_CLK
RXD[3:0] / RX_ER
INPUT BLW
COMPENSATION
BP_4B5B
BP_SCR
SIGNAL
DETECT
NRZI TO NRZ
DECODER
CODE GROUP
ALIGNMENT
SERIAL TO
PARALLEL
MUX
MUX
LINK STATUS
CLOCK
RECOVERY
MODULE
CLOCK
LINK
MONITOR
÷5
ADC
AGC