Datasheet

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DP83846A
3.7 Crystal Oscillator Circuit
The DsPHYTER supports an external CMOS level oscilla-
tor source or a crystal resonator device. If an external clock
source is used, X1 should be tied to the clock source and
X2 should be left floating. In either case, the clock source
must be a 25 MHz 0.005% (50 PPM) CMOS oscillator, or a
25 MHz (50 PPM), parallel, 20 pF load crystal resonator.
Figure 11 below shows a typical connection for a crystal
resonator circuit. The load capacitor values will vary with
the crystal vendors; check with the vendor for the recom-
mended loads.
The oscillator circuit was designed to drive a parallel reso-
nance AT cut crystal with a maximum drive level of 500µW.
If a crystal is specified for a lower drive level, a current lim-
iting resistor should be placed in series between X2 and
the crystal.
As a starting point for evaluating an oscillator circuit, if the
requirements for the crystal are not known, C
L1
and C
L2
should be set at 22 pF, and R
1
should be set at 0Ω.
4.0 Reset Operation
The DP83846A can be reset either by hardware or soft-
ware. A hardware reset may be accomplished by asserting
the RESET pin after powering up the device (this is
required) or during normal operation when a reset is
needed. A software reset is accomplished by setting the
reset bit in the Basic Mode Control Register.
While either the hardware or software reset can be imple-
mented at any time after device initialization, a hardware
reset, as described in Section 4.1 must be provided upon
device power-up/initialization. Omitting the hardware reset
operation during the device power-up/initialization
sequence can result in improper device operation.
4.1 Hardware Reset
A hardware reset is accomplished by applying a low pulse
(TTL level), with a duration of at least 160 µs, to the
RESET pin during normal operation. This will reset the
device such that all registers will be reset to default values
and the hardware configuration values will be re-latched
into the device (similar to the power-up/reset operation).
4.2 Software Reset
A software reset is accomplished by setting the reset bit
(bit 15) of the Basic Mode Control Register (BMCR). The
period from the point in time when the reset bit is set to the
point in time when software reset has concluded is approx-
imately 160 µs.
The software reset will reset the device such that all regis-
ters will be reset to default values and the hardware config-
uration values will be re-latched into the device (similar to
the power-up/reset operation). Software driver code should
wait 500 µs following a software reset before allowing fur-
ther serial MII operations with the DP83846A.
Figure 11. Crystal Oscillator Circuit
X1
X2
C
L2
C
L1
R
1
Obsolete