Datasheet

1.0 Pin Descriptions (Continued)
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1.2 10 Mb/s and 100 Mb/s PMD Interface
RXD[3]
RXD[2]
RXD[1]
RXD[0]
O, Z 12
13
14
15
RECEIVE DATA: Nibble wide receive data (synchronous to RX_CLK, 25 MHz for
100BASE-X mode, 2.5 MHz for 10BASE-T nibble mode). Data is driven on the falling
edge of RX_CLK.
In 10 Mb/s serial mode, the RXD[0] pin is used as the data output pin which is also
clocked out on the falling edge of RX_CLK. During 10 Mb/s serial mode RXD[3:1] pins
become don't cares.
RX_EN I 23 RECEIVE ENABLE: Active high enable for receive signals RXD[3:0], RX_CLK, RX_DV
and RX_ER. A low on this input places these output pins in the TRI-STATE mode. For
normal operation in a node or switch application, this pin should be pulled high. For op-
eration in a repeater application, this pin may be connected to a repeater controller.
RX_ER
(RXD[4])
O, Z 19 RECEIVE ERROR: Asserted high to indicate that an invalid symbol has been detected
within a received packet in 100 Mb/s mode.
In Symbol mode (
Symbol = 0), RX_ER becomes RXD[4] which is the MSB for the re-
ceive 5-bit data symbol.
RX_DV O, Z 20 RECEIVE DATA VALID: Asserted high to indicate that valid data is present on RXD[3:0]
for nibble mode and RXD[0] for serial mode. Data is driven on the falling edge of
RX_CLK.
This pin is not meaningful during Symbol mode.
Signal Name Type Pin # Description
Signal Name Type Pin # Description
TPTD-
TPTD+
O
(MLT-3
or
10BASE-T)
73
74
TRANSMIT DATA: Differential common output driver. This differential output
is configurable to either 10BASE-T or 100BASE-TX signaling:
10BASE-T: Transmission of Manchester encoded 10BASE-T packet data as
well as Link Pulses (including Fast Link Pulses for Auto-Negotiation purpos-
es.)
100BASE-TX: Transmission of ANSI X3T12 compliant MLT-3 data.
The DP83843 will automatically configure this common output driver for the
proper signal type as a result of either forced configuration or Auto-Negotia-
tion.
TPRD-
TPRD+
I
(MLT-3
or
10BASE-T)
65
67
RECEIVE DATA: Differential common input buffer. This differential input can
be configured to accept either 100BASE-TX or 10BASE-T signaling:
10BASE-T: Reception of Manchester encoded 10BASE-T packet data as well
as normal Link Pulses (including Fast Link Pulses for Auto-Negotiation pur-
poses.)
100BASE-TX: Reception of ANSI X3T12 compliant scrambled MLT-3 data.
The DP83843 will automatically configure this common input buffer to accept
the proper signal type as a result of either forced configuration or Auto-Nego-
tiation.
FXTD-/AUITD-
FXTD+/AUITD+
O
(PECL
or
AUI)
44
43
100BASE-FX or 10 Mb/s AUI TRANSMIT DATA: This configurable output
driver supports either 125 Mb/s PECL, for 100BASE-FX applications, or
10 Mb/s AUI signaling.
When configured as a 100BASE-FX transmitter this output sources
100BASE-FX standard compliant binary data for direct connection to an opti-
cal transceiver. This differential output is enabled only during 100BASE-FX
device configuration (see pin definition for
FXEN.)
When configured as an AUI driver this output sources AUI compatible
Manchester encoded data to support typical 10BASE2 or 10BASE5 products.