Datasheet

9.0 Electrical Specifications (Continued)
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9.4.3 100BASE-TX Transmit Packet Latency Timing
Note: For Normal mode, latency is determined by measuring the time from the first rising edge of TX_CLK occurring after the assertion of TX_EN to the first
bit of the “j” code group as output from the TPTD± pins. 1 bit time = 10ns in 100 Mb/s mode. For Symbol mode, because TX_EN has no meaning, latency
is measured from the first rising edge of TX_CLK occurring after the assertion of a data nibble on the Transmit MII to the first bit (MSB) of that nibble as
output from the TPTD± pins. 1 bit time = 10 ns in 100 Mb/s mode.
Parameter Description Notes Min Typ Max Units
T4.3.1 TX_CLK to TPTD+/− Latency 100 Mb/s Normal mode 6.0 bits
100 Mb/s Symbol mode 6.0 bits
TX_CLK
TX_EN
TXD
TPTD+/-
(J/K) IDLE DATA
T4.3.1