Datasheet

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8.0 Register Block (Continued)
4 CIM_STATUS 0, RO Carrier Integrity Monitor Status:
This bit indicates the status of the Carrier Integrity Monitor func-
tion. This status is optionally muxed out through the TX_LED pin
when the LED_TXRX_MODE bits (8:7) of the PHYCTRL register
(address 19h) are set to either <10> or <01>.
1 = Unstable link condition detected
0 = Unstable link condition not detected
3 CODE_ERR 0, RW Code Errors:
1 = Forces code errors to be reported with the value 5h on
RXD[3:0] and with RX_ER set to 1.
0 = Forces code errors to be reported with the value of 6h on
RXD[3:0] and with RX_ER set to 1.
2 PME_ERR 0, RW Premature End Errors:
1 = Forces premature end errors to be reported with the value 4h
on RXD[3:0] and with RX_ER set to 1.
0 = Forces premature end errors to be reported with the value 6h
on RXD[3:0] and with RX_ER set to 1. Premature end errors are
caused by the detection of two IDLE symbols in the receive data
stream prior to the T/R symbol pair denoting end of stream delim-
iter.
1 LINK_ERR 0, RW Link Errors:
1 = Forces link errors to be reported with the value 3h on
RXD[3:0] and with RX_ER set to 1.
0 = Data is passed to RXD[3:0] unchanged and with RX_ER set
to 0.
0 PKT_ERR 0, RW Packet Errors:
1 = Forces packet errors (722 s time-out) to be reported with the
value 2h on RXD[3:0] and with RX_ER set to 1.
0 = Data is passed to RXD[3:0] unchanged and with RX_ER set
to 0.
Table 21. Loopback & Bypass Register (LBR) Address 17h
Bit Bit Name Default Description
15 Reserved 0, RO Reserved: Writes ignored, read as 0.
14 BP_STRETCH 0, RW Bypass LED Stretching:
This will bypass the LED stretching and the LEDs will reflect the
internal value.
1 = Bypass LED stretching
0 = Normal operation
13 BP_4B5B Strap, RW Bypass 4B5B Encoding and 5B4B Decoding:
This bit is set according to the strap configuration of the SYMBOL
pin at power-up/reset. After reset this bit may be written to by soft-
ware.
1 = 4B5B encoder and 5B4B decoder functions bypassed
0 = Normal 4B5B and 5B4B operation
Table 20. 100 Mb/s PCS Configuration and Status Register (PCSR) Address 16h (Continued)
Bit Bit Name Default Description