Datasheet

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8.0 Register Block (Continued)
12 DESCR_TO_SEL 0, RW Descrambler Time-out Select:
1 = Descrambler Timer set to 2 ms
0 = Descrambler Timer set to 722 µs
The Descrambler Timer selects the interval over which a mini-
mum number of IDLES are required to be received to maintain
descrambler synchronization. The default time of 722 µs sup-
ports 100BASE-X compliant applications.
A timer time-out indicates a loss of descrambler synchronization
which cause the descrambler to restart its operation by immedi-
ately looking for IDLES.
The 2 ms option allows applications with Maximum Transmission
Units (packet sizes) larger than IEEE 802.3 to maintain descram-
bler synchronization (i.e., Token Ring/Fast-Ethernet switch/rout-
er applications).
11 DESCR_TO_DIS 0, RW Descrambler Time-out Disable:
1 = Time-out Counter in the descrambler section of the receiver
disabled
0 = Time-out Counter enabled
10 LD_SCR_SD 0, RW Load Scrambler Seed:
1 = Load Scrambler Seed continuously
0 = Normal operation
9 TX_QUIET 0, RW 100 Mps Transmit True Quiet Mode:
1 = Transmit True Quiet mode
0 = Normal mode
8:7 TX_PATTERN[1:0] <00>, RW 100 Mps Transmit Test Pattern:
<00> = Normal operation
<01> = Send FEFI pattern
<10> = Send 1.28 µsperiod pattern (640 ns high/low time)
<11> = Send 160 ns period pattern (80 ns high/low time)
6 F_LINK_100 0, RW Force Good Link in 100 Mb/s:
1 = Force 100 Mb/s Good Link status
0 = Normal 100 Mb/s operation
This bit is useful for diagnostic purposes.
5 CIM_DIS Strap, RW Carrier Integrity Monitor Disable:
1 = Carrier Integrity Monitor function disabled (Node/Switch oper-
ation)
0 = Carrier Integrity Monitor function enabled (Repeater opera-
tion)
The THIN/REPEATER determines the default state of this bit to
automatically enable or disable the CIM function as required for
IEEE 802.3 compliant applications. The value latched into this bit
at power-on/reset is the compliment of the value forced on the
THIN/REPEATER input. After power-on/reset, software may en-
able or disable this function independent of repeater or
node/switch mode.
Table 20. 100 Mb/s PCS Configuration and Status Register (PCSR) Address 16h (Continued)
Bit Bit Name Default Description