Datasheet
3.0 Configuration (Continued)
30 www.national.com
base and next pages. Software must be available to per-
form several functions. The ANER (register 6) must have a
page received (bit 1), once the DP83843 receives the first
page, software must store it in memory if it wants to keep
the information. Auto-Negotiation keeps a copy of the base
page information but it is no longer accessible by software.
After reading the base page information, software needs to
write to ANNPTR (register 7) to load the next page informa-
tion to be sent. Continue to poll the page received bit in the
ANER and when active read the ANLPAR. The contents of
the ANLPAR will tell if the partner has further pages to be
sent. As long as the partner has more pages to send, soft-
ware must write to the next page transmit register and load
another page.
The Auto-Negotiation Expansion Register (ANER) at
address 06h indicates additional Auto-Negotiation status.
The ANER provides status on:
— Whether a Parallel Detect Fault has occurred (bit 4, reg-
ister address 06h)
— Whether the Link Partner supports the Next Page func-
tion (bit 3, register address 06h)
— Whether the DP83843 supports the Next Page function
(bit 2, register address 06h). The DP83843 does support
the Next Page function.
— Whether the current page being exchanged by Auto-Ne-
gotiation has been received (bit1, register address 06h)
— Whether the Link Partner supports Auto-Negotiation (bit
0, register address 06h)
The Auto-Negotiation Next Page Transmit Register
(ANNPTR) at address 07h contains the next page code
word to be sent. See Table 13 for a bit description of this
register.
3.1.3 Auto-Negotiation Parallel Detection
The DP83843 supports the Parallel Detection function as
defined in the IEEE 802.3u specification. Parallel Detection
requires both the 10 Mb/s and 100 Mb/s receivers to moni-
tor the receive signal and report link status to the Auto-
Negotiation function. Auto-Negotiation uses this informa-
tion to configure the correct technology in the event that the
Link Partner does not support Auto-Negotiation yet is
transmitting link signals that the 100BASE-X or 10BASE-T
PMAs recognize as valid link signals.
The Auto-Negotiation function will only accept a valid link
signal for the purpose of Parallel Detection from PMAs
which have a corresponding bit set in the Auto-Negotiation
Advertisement register, (ANAR register bits 5 and 7,
address 04h.) This allows the DP83843 to be configured
for 100 Mb/s only, 10 Mb/s only, or 10 Mb/s & 100 Mb/s
CSMA/CD operation depending on the advertised abilities.
The state of these bits may be modified via the AN0 and
AN1 pins or by writing to the ANAR. For example, if bit 5 is
zero, and bit 7 is one in the ANAR (i.e. 100 Mb/s CSMA/CD
only), and the Link Partner is 10BASE-T without Auto-
Negotiation, then Auto-Negotiation will not complete since
the advertised abilities and the detected abilities have no
common mode. This operation allows the DP83843 to be
used in single mode (i.e. repeater) applications as well as
dual mode applications (i.e. 10/100 nodes or switches).
If the DP83843 completes Auto-Negotiation as a result of
Parallel Detection, without Next Page operation, bits 5 and
7 within the ANLPAR register (register address 05h) will be
set to reflect the mode of operation present in the Link Part-
ner. Note that bits 4:0 of the ANLPAR will also be set to
00001 based on a successful parallel detection to indicate
a valid 802.3 selector field. Software may determine that
negotiation completed via Parallel Detection by reading a
zero in the Link Partner Auto-Negotiation Able bit (bit 0,
register address 06h) once the Auto-Negotiation Complete
bit (bit 5, register address 01h) is set. If configured for par-
allel detect mode and any condition other than a single
good link occurs then the parallel detect fault bit will set (bit
4, register 06h).
3.1.4 Auto-Negotiation Restart
Once Auto-Negotiation has completed, it may be restarted
at any time by setting bit 9 of the BMCR to one. If the mode
configured by a successful Auto-Negotiation loses a valid
link, then the Auto-Negotiation process will resume and
attempt to determine the configuration for the link. This
function ensures that a valid configuration is maintained if
the cable becomes disconnected.
A renegotiation request from any entity, such as a manage-
ment agent, will cause the DP83843 to halt any transmit
data and link pulse activity until the break_link_timer
expires (~1500ms). Consequently, the Link Partner will go
into link fail and normal Auto-Negotiation resumes. The
DP83843 will resume Auto-Negotiation after the
break_link_timer has expired by issuing FLP (Fast Link
Pulse) bursts.
3.1.5 Enabling Auto-Negotiation via Software
It is important to note that if the DP83843 has been initial-
ized upon power-up as a non-auto-negotiating device
(forced technology), and it is then required that Auto-Nego-
tiation or re-Auto-Negotiation be initiated via software, bit
12 of the Basic Mode Control Register (address 00h) must
first be cleared and then set for any Auto-Negotiation func-
tion to take effect.
3.1.6 Auto-Negotiation Complete Time
Parallel detection and Auto-Negotiation take approximately
2-3 seconds to complete. In addition, Auto-Negotiation with
next page should take approximately 2-3 seconds to com-
plete, depending on the number of next pages sent.
Refer to chapter 28 of the IEEE 802.3u standard for a full
description of the individual timers related to Auto-Negotia-
tion.
Auto-Negotiation Next Page Support
The DP83843 supports the optional Auto-Negotiation Next
Page protocol. The ANNPTR register (address 07h) allows
for the configuration and transmission of Next Page. Refer
to clause 28 of the IEEE 802.3u standard for detailed infor-
mation regarding the Auto-Negotiation Next Page function.
3.2 PHY Address and LEDs
The DP83843 maps the 5 PHY address input pins onto the
5 LED output pins as:
LED_COL <=> PHYAD[0]
LED_TX <=> PHYAD[1]
LED_RX <=> PHYAD[2]
LED_LINK <=> PHYAD[3]
LED_FDPOL <=> PHYAD[4]
The DP83843 can be set to respond to any of 32 possible
PHY addresses. Each DP83843 connected to a common
serial MII must have a unique address. It should be noted