Datasheet

2.0 Functional Description (Continued)
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2.3.6 NRZI to NRZ
In a typical application, the NRZI to NRZ decoder is
required in order to present NRZ formatted data to the
descrambler (or to the code-group alignment block, if the
descrambler is bypassed, or directly to the PCS, if the
receiver is bypassed).
The receive data stream is in NRZI format, therefore, the data
must be decoded to NRZ before further processing.
2.3.7 Serial to Parallel
The 100BASE-X receiver includes a Serial to Parallel con-
verter which supplies 5 bit wide data symbols to the
Descrambler. Converting to parallel helps to decrease
latency through the device, as well as performing the
required function for ultimately providing data to the nibble-
wide interface of the MII.
2.3.8 Descrambler
A 5-bit parallel (code-group wide) descrambler is used to
descramble the receive NRZ data. To reverse the data
scrambling process, the descrambler has to generate an
identical data scrambling sequence (N) in order to recover
the original unscrambled data (UD) from the scrambled
data (SD) as represented in the equations:
Synchronization of the descrambler to the original scram-
bling sequence (N) is achieved based on the knowledge
that the incoming scrambled data stream consists of
scrambled IDLE data. After the descrambler has recog-
nized 12 consecutive IDLE code-groups, where an IDLE
code-group in 5B NRZ is equal to five consecutive ones
(11111), it will synchronize to the receive data stream and
generate unscrambled data in the form of unaligned 5B
code-groups.
In order to maintain synchronization, the descrambler must
continuously monitor the validity of the unscrambled data
that it generates. To ensure this, a line state monitor and a
hold timer are used to constantly monitor the synchroniza-
tion status. Upon synchronization of the descrambler the
hold timer starts a 722 µs countdown. Upon detection of
sufficient IDLE code-groups within the 722 µs period, the
hold timer will reset and begin a new countdown. This mon-
itoring operation will continue indefinitely given a properly
operating network connection with good signal integrity. If
the line state monitor does not recognize sufficient
unscrambled IDLE code-groups within the 722 µs period,
the entire descrambler will be forced out of the current state
of synchronization and reset in order to re-acquire synchro-
nization.
The value of the time-out for this timer may be modified
from 722 sto 2 ms by setting bit 12 of the PCSR (address
16h) to one. The 2 ms option allows applications with Maxi-
mum Transmission Units (packet sizes) larger than IEEE
802.3 specifications to maintain descrambler synchroniza-
tion (i.e. switch or router applications).
Additionally, this timer may be disabled entirely by setting
bit 11 of the PCSR (address 16h) to one. The disabling of
the time-out timer is not recommended as this will eventu-
ally result in a lack of synchronization between the transmit
scrambler and the receive descrambler which will corrupt
data. The descrambler time-out counter may be reset by bit
13 of the PCSR.
2.3.9 Code-group Alignment
The code-group alignment module operates on unaligned
5-bit data from the descrambler (or, if the descrambler is
bypassed, directly from the NRZI/NRZ decoder) and con-
verts it into 5B code-group data (5 bits). Code-group align-
ment occurs after the J/K code-group pair is detected.
Once the J/K code-group pair (11000 10001) is detected,
subsequent data is aligned on a fixed boundary.
2.3.10 4B/5B Decoder
The code-group decoder functions as a look up table that
translates incoming 5B code-groups into 4B nibbles. The
code-group decoder first detects the J/K code-group pair
preceded by IDLE code-groups and replaces the J/K with
Figure 1. MLT-3 Signal Measured at AII after 50 meters
of CAT-5 cable
Figure 2. MLT-3 Signal Measured at AII after 100 meters
of CAT-5 cable
2ns/div
2ns/div
UD SD N⊕()=
SD UD N⊕()=