Datasheet

DP83640
www.ti.com SNOSAY8E –SEPTEMBER 2007–REVISED APRIL 2013
Table 10-2. Register Table (continued)
Register Addr Tag Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Name
PHY Control 1Fh PCFCR PCF_ST PCF_ST Reserve Reserve Reserve Reserve Reserve PCF_DA PCF_IN PCF_IN PCF_BC_ PCF_BU PCF_BUF PCF_BU PCF_BUF PCF_EN
Frames S_ERR S_OK d d d d d _SEL T_CTL T_CTL DIS F F
Configuration
Register
TEST REGISTERS - PAGE 1
RESERVED 14h-1Dh Reserve Reserve Reserve Reserve Reserve Reserve Reserve Reserve Reserve Reserve Reserve Reserved Reserve Reserved Reserve Reserved Reserve
d d d d d d d d d d d d d d
Signal Detect 1Eh SD_CN Reserve Reserve Reserve Reserve Reserve Reserve Reserve SD_Tim Reserve Reserve Reserved Reserve Reserved Reserve Reserved Reserve
Configuration FG d d d d d d d e d d d d d
Register
RESERVED 1Fh Reserve Reserve Reserve Reserve Reserve Reserve Reserve Reserve Reserve Reserve Reserve Reserved Reserve Reserved Reserve Reserved Reserve
d d d d d d d d d d d d d d
LINK DIAGNOSTICS REGISTERS - PAGE 2
100 Mb Length 14h LEN100 Reserve Reserve Reserve Reserve Reserve Reserve Reserve Reserve CABLE_ CABLE_ CABLE_L CABLE_ CABLE_L CABLE_ CABLE_L CABLE_
Detect _DET d d d d d d d d LEN LEN EN LEN EN LEN EN LEN
Register
100 Mb 15h FREQ10 SAMPL Reserve Reserve Reserve Reserve Reserve Reserve SEL_FC FREQ_ FREQ_ FREQ_OF FREQ_ FREQ_OF FREQ_ FREQ_OF FREQ_
Frequency 0 E_FRE d d d d d d OFFSET OFFSET FSET OFFSET FSET OFFSET FSET OFFSET
Offset Q
Indication
Register
TDR Control 16h TDR_CT TDR_E TDR_10 TX_CHA RX_CH SEND_T TDR_WI TDR_WI TDR_WI TDR_MI Reserve RX_THRE RX_TH RX_THRE RX_TH RX_THRE RX_TH
Register RL NABLE 0Mb NNEL ANNEL DR DTH DTH DTH N_MOD d SHOLD RESHO SHOLD RESHO SHOLD RESHO
E LD LD LD
TDR Window 17h TDR_WI TDR_ST TDR_ST TDR_ST TDR_ST TDR_ST TDR_ST TDR_ST TDR_ST TDR_ST TDR_ST TDR_STO TDR_ST TDR_STO TDR_ST TDR_STO TDR_ST
Register N ART ART ART ART ART ART ART ART OP OP P OP P OP P OP
TDR Peak 18h TDR_PE Reserve Reserve TDR_PE TDR_PE TDR_PE TDR_PE TDR_PE TDR_PE TDR_PE TDR_PE TDR_PEA TDR_PE TDR_PEA TDR_PE TDR_PEA TDR_PE
Measurement AK d d AK AK AK AK AK AK AK_TIM AK_TIM K_TIME AK_TIM K_TIME AK_TIM K_TIME AK_TIM
Register E E E E E
TDR Threshold 19h TDR_TH Reserve Reserve Reserve Reserve Reserve Reserve Reserve TDR_TH TDR- TDR- TDR- TDR- TDR- TDR- TDR- TDR-
Measurement R d d d d d d d R_MET THR_TI THR_TI THR_TIM THR_TI THR_TIM THR_TI THR_TIM THR_TI
Register ME ME E ME E ME E ME
Variance 1Ah VAR_CT VAR_R Reserve Reserve Reserve Reserve Reserve Reserve Reserve Reserve Reserve LOAD_VA LOAD_V VAR_FRE VAR_TI VAR_TIM VAR_E
Control RL DY d d d d d d d d d R_HI AR_LO EZE MER ER NABLE
Register
Variance Data 1Bh VAR_D VAR_D VAR_D VAR_D VAR_D VAR_D VAR_D VAR_D VAR_D VAR_D VAR_D VAR_DAT VAR_D VAR_DAT VAR_D VAR_DAT VAR_D
Register ATA ATA ATA ATA ATA ATA ATA ATA ATA ATA ATA A ATA A ATA A ATA
Reserved 1Ch Reserve Reserve Reserve Reserve Reserve Reserve Reserve Reserve Reserve Reserve Reserve Reserved Reserve Reserved Reserve Reserved Reserve
d d d d d d d d d d d d d d
Link Quality 1Dh LQMR LQM_E RESTA RESTA RESTA RESTA RESTA FC_HI_ FC_LO_ FREQ_ FREQ_L DBLW_HI DBLW_ DAGC_HI DAGC_ C1_HI_W C1_LO_
Monitor NABLE RT_ON_ RT_ON_ RT_ON_ RT_ON_ RT_ON_ WARN WARN HI_WAR O_WAR _WARN LO_WA _WARN LO_WA ARN WARN
Register FC FREQ DBLW DAGC C1 N N RN RN
Link Quality 1Eh LQDR Reserve Reserve SAMPL WRITE_ LQ_PAR LQ_PAR LQ_PAR LQ_THR LQ_THR LQ_THR LQ_THR_ LQ_THR LQ_THR_ LQ_THR LQ_THR_ LQ_THR
Data Register d d E_PARA LQ_THR AM_SEL AM_SEL AM_SEL _SEL _DATA _DATA DATA _DATA DATA _DATA DATA _DATA
M
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