Datasheet

TX_CLK
TX_EN
0 0
1 1
T2.14.1
T2.14.2
PMD Output
Pair
PMD Output
Pair
T2.13.1
TX_CLK
TX_EN
TXD[3:0]
PMD Output
Pair
DP83640
SNOSAY8E SEPTEMBER 2007REVISED APRIL 2013
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4.17 AC Specifications — 10BASE-T MII Transmit Timing (Start of Packet)
Parameter Description Notes Min Typ Max Units
(1)
T2.13.1 Transmit Output Delay from the 10 Mb/s MII mode 3.5 bits
Falling Edge of TX_CLK
(1) 1 bit time = 100 ns in 10 Mb/s.
Figure 4-13. 10BASE-T MII Transmit Timing (Start of Packet)
4.18 AC Specifications — 10BASE-T MII Transmit Timing (End of Packet)
Parameter Description Notes Min Typ Max Units
T2.14.1 End of Packet High Time 250 300 ns
(with '0' ending bit)
T2.14.2 End of Packet High Time 250 300 ns
(with '1' ending bit)
Figure 4-14. 10BASE-T MII Transmit Timing (End of Packet)
28 Electrical Specifications Copyright © 2007–2013, Texas Instruments Incorporated
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