Datasheet

DP83640
www.ti.com SNOSAY8E –SEPTEMBER 2007–REVISED APRIL 2013
10.4 Link Diagnostics Registers - Page 2
Page 2 Link Diagnostics Registers are accessible by setting bits [2:0] = 010 of PAGESEL (13h).
10.4.1 100 Mb Length Detect Register (LEN100_DET), Page 2
This register contains linked cable length estimation in 100 Mb operation. The cable length is an
estimation of the effective cable length based on the characteristics of the recovered signal. The cable
length is valid only during 100 Mb operation with a valid Link status indication.
Table 10-28. 100 Mb Length Detect Register (LEN100_DET), address 0x14
Bit Bit Name Default Description
15:8 RESERVED 0000 0000, RO RESERVED: Writes ignored, read as 0.
7:0 CABLE_LEN 1111 1111, RO Cable Length Estimate:
Indicates an estimate of effective cable length in meters. A value of FFh
indicates cable length cannot be determined.
10.4.2 100 Mb Frequency Offset Indication Register (FREQ100), Page 2
This register returns an indication of clock frequency offset relative to the link partner. Two values can be
read, the long term Frequency Offset, or a short term Frequency Control value. The Frequency Control
value includes short term phase correction. The variance between the Frequency Control value and the
Frequency Offset can be used as an indication of the amount of jitter in the system.
Table 10-29. 100 Mb Frequency Offset Indication Register (FREQ100), address 0x15
Bit Bit Name Default Description
15 SAMPLE_FREQ 0, WO Sample Frequency Offset:
If SEL_FC is set to a 0, then setting this bit to a 1 will poll the DSP for
the long-term Frequency Offset value. The value will be available in
the FREQ_OFFSET bits of this register.
If SEL_FC is set to a 1, then setting this bit to a 1 will poll the DSP for
the current Frequency Control value. The value will be available in the
FREQ_OFFSET bits of this register.
This register bit will always read back as 0.
14:9 RESERVED 000 000, RO RESERVED: Writes ignored, read as 0.
8 SEL_FC 0, RW Select Frequency Control:
Setting this bit to a 1 will select the current Frequency Control value
instead of the Frequency Offset. This value contains Frequency Offset
plus the short term phase correction and can be used to indicate
amount of jitter in the system. The value will be available in the
FREQ_OFFSET bits of this register.
7:0 FREQ_OFFSET 0000 0000, RO Frequency Offset:
Frequency offset value loaded from the DSP following assertion of the
SAMPLE_FREQ control bit. The Frequency Offset or Frequency
Control value is a twos-complement signed value in units of
approximately 5.1562 ppm. The range is as follows:
0x7F = +655 ppm
0x00 = 0 ppm
0x80 = -660 ppm
Copyright © 2007–2013, Texas Instruments Incorporated Register Block 105
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