Datasheet

DP83640
www.ti.com SNOSAY8E –SEPTEMBER 2007–REVISED APRIL 2013
The decoder detects the end of a frame when no additional mid-bit transitions are detected. Within one
and a half bit times after the last bit, carrier sense is de-asserted. Receive clock stays active for five more
bit times after CRS goes low, to verify the receive timings of the controller.
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