Datasheet

DP83640

SNOSAY8E –SEPTEMBER 2007–REVISED APRIL 2013

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The Receive section consists of the following functional blocks:

• Analog Front End

• Input and BLW Compensation

• Signal Detect

• Digital Adaptive Equalization

• MLT-3 to Binary Decoder

• Clock Recovery Module

• NRZI to NRZ Decoder

• Serial to Parallel

• Descrambler (bypass option)

• Code Group Alignment

• 4B/5B Decoder

• Link Integrity Monitor

• Bad SSD Detection

7.2.1 Analog Front End

In addition to the Digital Equalization and Gain Control, the DP83640 includes Analog Equalization and

Gain Control in the Analog Front End. The Analog Equalization reduces the amount of Digital Equalization

required in the DSP.

7.2.2 Digital Signal Processor

The Digital Signal Processor includes Base Line Wander Compensation and Adaptive Equalization with

Gain Control.

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