Datasheet

DP83640
www.ti.com SNOSAY8E –SEPTEMBER 2007–REVISED APRIL 2013
5.8.2 Interrupt Mechanisms
The interrupt function is controlled via register access. All interrupt sources are disabled by default. Setting
bit 1 (INTEN) of MICR (11h) will enable interrupts to be output, dependent on the interrupt mask set in the
lower byte of the MISR (12h). The PWRDOWN/INTN pin is asynchronously asserted low when an
interrupt condition occurs. The source of the interrupt can be determined by reading the upper byte of the
MISR. One or more bits in the MISR will be set, denoting all currently pending interrupts. Reading of the
MISR clears ALL pending interrupts.
Example: To generate an interrupt on a change of link status or on a change of energy detect power state,
the steps would be:
• Write 0003h to MICR to set INTEN and INT_OE
• Write 0060h to MISR to set ED_INT_EN and LINK_INT_EN
• Monitor PWRDOWN/INTN pin
When PWRDOWN/INTN pin asserts low, the user would read the MISR register to see if the ED_INT or
LINK_INT bits are set, i.e. which source caused the interrupt. After reading the MISR, the interrupt bits
should clear and the PWRDOWN/INTN pin will de-assert.
5.9 Energy Detect Mode
When Energy Detect is enabled and there is no activity on the cable, the DP83640 will remain in a low
power mode while monitoring the transmission line. Activity on the line will cause the DP83640 to go
through a normal power up sequence. Regardless of cable activity, the DP83640 will occasionally wake
up the transmitter to put ED pulses on the line, but will otherwise draw as little power as possible. Energy
detect functionality is controlled via register Energy Detect Control (EDCR), address 1Dh.
5.10 Link Diagnostic Capabilities
The DP83640 contains several system diagnostic capabilities for evaluating link quality and detecting
potential cabling faults in twisted pair cabling. Software configuration is available through the Link
Diagnostics Registers - Page 2 which can be selected via Page Select Register (PAGESEL), address 13h.
These capabilities include:
• Linked Cable Status
• Link Quality Monitor
• TDR (Time Domain Reflectometry) Cable Diagnostics
5.10.1 Linked Cable Status
In an active connection with a valid link status, the following diagnostic capabilities are available:
• Polarity reversal
• Cable swap (MDI vs MDIX) detection
• 100 Mb Cable Length Estimation
• Frequency offset relative to link partner
• Cable Signal Quality Estimation
5.10.1.1 Polarity Reversal
The DP83640 detects polarity reversal by detecting negative link pulses. The Polarity indication is
available in bit 12 of the PHYSTS (10h) or bit 4 of the 10BTSCR (1Ah). Inverted polarity indicates the
positive and negative conductors in the receive pair are swapped. Since polarity is corrected by the
receiver, this does not necessarily indicate a functional problem in the cable.
Since the polarity indication is dependent on link pulses from the link partner, polarity indication is only
valid in 10 Mb modes of operation, or in 100 Mb Auto-Negotiated mode. Polarity indication is not available
in 100 Mb forced mode of operation or in a parallel detected 100 Mb mode.
Copyright © 2007–2013, Texas Instruments Incorporated Configuration 47
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