Datasheet

TX_CLK
TX_EN
TXD[3:0]
CRS/CRS_DV
RX_CLK
RX_DV
RXD[3:0]
T2.22.1
DP83640
SNOSAY8E –SEPTEMBER 2007–REVISED APRIL 2013 www.ti.com
4.26 AC Specifications — 100 Mb/s Internal Loopback Timing
Parameter Description Notes Min Typ Max Units
TX_EN to RX_DV Loopback
(1)
100 Mb/s internal loopback 240 ns
T2.22.1 mode
(2)
(1) Due to the nature of the descrambler function, all 100BASE-TX Loopback modes will cause an initial “dead-time” of up to 550 µs during
which time no data will be present at the receive MII outputs. The 100BASE-TX timing specified is based on device delays after the
initial 550µs “dead-time”.
(2) Measurement is made from the first rising edge of TX_CLK after assertion of TX_EN.
Figure 4-22. 100 Mb/s Internal Loopback Timing
32 Electrical Specifications Copyright © 2007–2013, Texas Instruments Incorporated
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