Datasheet

T2.2.4
T2.2.2
32 CLOCKS
T2.2.3
outputinput
Vcc
X1 clock
Hardware
RESET_N
MDC
Latch-In of Hardware
Configuration Pins
Dual Function Pins
Become Enabled As Outputs
T2.2.1
DP83640
SNOSAY8E –SEPTEMBER 2007–REVISED APRIL 2013 www.ti.com
4.6 AC Specifications — Reset Timing
Parameter Description Notes Min Typ Max Units
T2.2.1 Post RESET Stabilization time prior to MDIO is pulled high for 32-bit serial 3 µs
MDC preamble for register accesses management initialization
T2.2.2 Hardware Configuration Latch-in Time Hardware Configuration Pins are 3 µs
from the Deassertion of RESET (either described in the Section 3
soft or hard)
T2.2.3 Hardware Configuration pins transition 50 ns
to output drivers
(1)
T2.2.4 RESET pulse width X1 Clock must be stable for at min. 1 µs
of 1 µs during RESET pulse low
time.
(1) It is important to choose pull-up and/or pull-down resistors for each of the hardware configuration pins that provide fast RC time
constants in order to latch-in the proper value prior to the pin transitioning to an output driver.
Figure 4-2. Reset Timing
22 Electrical Specifications Copyright © 2007–2013, Texas Instruments Incorporated
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