Datasheet

DP83640
SNOSAY8E –SEPTEMBER 2007–REVISED APRIL 2013 www.ti.com
Table 10-54. PTP Transmit Configuration Register 0 (PTP_TXCFG0), address 0x16 (continued)
Bit Bit Name Default Description
4:1 TX_PTP_VER 0 000, RW PTP Version:
Enable Timestamp capture for a specific version of the IEEE 1588 specification. This
field may be programmed to any value between 1 and 15 and allows support for
future versions of the IEEE 1588 specification. A value of 0 will disable version
checking (not recommended).
0 TX_TS_EN 0, RW Transmit Timestamp Enable:
Enable Timestamp capture for Transmit.
10.6.4 PTP Transmit Configuration Register 1 (PTP_TXCFG1), Page 5
This register provides data and mask fields to filter the first byte in a PTP Message. This function will be
disabled if all the mask bits are set to 0.
Table 10-55. PTP Transmit Configuration Register 1 (PTP_TXCFG1), address 0x17
Bit Bit Name Default Description
15:8 BYTE0_MASK 0000 0000, RW Byte0 Data:
Bit mask to be used for matching Byte0 of the PTP Message. A one in any bit
enables matching for the associated data bit. If no matching is required, all bits of
the mask should be set to 0.
7:0 BYTE0_DATA 0000 0000, RW Byte0 Mask:
Data to be used for matching Byte0 of the PTP Message.
10.6.5 PHY Status Frame Configuration Register 0 (PSF_CFG0), Page 5
This register provides configuration for the PHY Status Frame function.
Table 10-56. PHY Status Frame Configuration Register 0 (PSF_CFG0), address 0x18
Bit Bit Name Default Description
15:1 RESERVED 000, RO Reserved: Writes ignored, Read as 0
3
12:1 MAC_SRC_ADD 0 0, RW PHY Status Frame Mac Source Address:
1 Selects source address as follows:
00 : Use Mac Address [08 00 17 0B 6B 0F]
01 : Use Mac Address [08 00 17 00 00 00]
10 : Use Mac Multicast Dest Address
11 : Use Mac Address [00 00 00 00 00 00]
10:8 MIN_PRE 000, RW PHY Status Frame Minimum Preamble:
Determines the minimum preamble bytes required for sending packets on the MII
interface. It is recommended that this be set to the smallest value the MAC will
tolerate.
7 PSF_ENDIAN 0, RW PHY Status Frame Endian Control:
For each 16-bit field in a Status Message, the data will normally be presented in
network byte order (Most significant byte first). If this bit is set to a 1, the byte data
fields will be reversed so that the least significant byte is first.
6 PSF_IPV4 0, RW PHY Status Frame IPv4 Enable:
This bit controls the type of packet used for PHY Status Frames.
0 = Layer2 Ethernet packets
1 = IPv4 packets.
5 PSF_PCF_RD 0, RW PHY Control Frame Read PHY Status Frame Enable:
Enable PHY Status Frame delivery of PHY Control Frame read data. Data read via
a PHY Control Frame will be returned in a PHY Status Frame.
4 PSF_ERR_EN 0, RW PSF Error PHY Status Frame Enable:
Enable PHY Status Frame delivery of PHY Status Frame Errors. This bit will not
independently enable PHY Status Frame operation. One of the other enable bits
must be set for PHY Status Frames to be generated.
3 PSF_TXTS_EN 0, RW Transmit Timestamp PHY Status Frame Enable:
Enable PHY Status Frame delivery of Transmit Timestamps.
122 Register Block Copyright © 2007–2013, Texas Instruments Incorporated
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