Datasheet

DP83640

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SNOSAY8E –SEPTEMBER 2007–REVISED APRIL 2013

3 Pin Descriptions

The DP83640 pins are classified into the following interface categories (each interface is described in the

sections that follow):

• Serial Management Interface

• MAC Data Interface

• Clock Interface

• LED Interface

• GPIO Interface

• JTAG Interface

• Reset and Power Down

• Strap Options

• 10/100 Mb/s PMD Interface

• Power and Ground pins

Note: Strapping pin option. Please see Section 3.10 for strap definitions.

All DP83640 signal pins are I/O cells regardless of the particular use. The definitions below define the

functionality of the I/O cells for each pin.

• Type I: Input

• Type O: Output

• Type I/O: Input/Output

• Type OD: Open Drain

• Type PD: Internal Pulldown

• Type PU: Internal Pullup

• Type S: Strapping Pin (All strap pins have weak internal pull-ups or pull-downs. If the default strap

value is to be changed then an external 2.2 kΩ resistor should be used. Please see Section 3.10 for

details.

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Product Folder Links: DP83640