Datasheet

DP83630
www.ti.com SNLS335B –OCTOBER 2010–REVISED APRIL 2013
Table 10-2. Register Table (continued)
Register Name Addr Tag Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
PHY Status Frame 18h PSF_CFG0 Reserved Reserved Reserved MAC_SRC MAC_SRC MIN_PRE MIN_PRE MIN_PRE PSF_ENDI PSF_IPV4 PSF_PCF_R PSF_ERR_ PSF_TXTS_E PSF_RXTS PSF_TRIG_E PSF_EVNT
Configuration _ADD _ADD AN D EN N _EN N _EN
Register 0
PTP Receive 19h PTP_RXCF DOMAIN_E Reserved USER_IP_ USER_IP_ RX_SLAVE IP1588_EN IP1588_EN IP1588_EN RX_L2_EN RX_IPV6_ RX_IPV4_EN RX_PTP_V RX_PTP_VE RX_PTP_V RX_PTP_VE RX_TS_EN
Configuration G0 N SEL EN EN ER R ER R
Register 0
PTP Receive 1Ah PTP_RXCF BYTE0_MA BYTE0_MA BYTE0_MA BYTE0_MA BYTE0_MA BYTE0_MA BYTE0_MA BYTE0_MA BYTE0_DA BYTE0_DA BYTE0_DAT BYTE0_DA BYTE0_DAT BYTE0_DA BYTE0_DAT BYTE0_DA
Configuration G1 SK SK SK SK SK SK SK SK TA TA A TA A TA A TA
Register 1
PTP Receive 1Bh PTP_RXCF IP_ADDR_ IP_ADDR_ IP_ADDR_ IP_ADDR_ IP_ADDR_ IP_ADDR_ IP_ADDR_ IP_ADDR_ IP_ADDR_ IP_ADDR_ IP_ADDR_DA IP_ADDR_ IP_ADDR_DA IP_ADDR_ IP_ADDR_DA IP_ADDR_
Configuration G2 DATA DATA DATA DATA DATA DATA DATA DATA DATA DATA TA DATA TA DATA TA DATA
Register 2
PTP Receive 1Ch PTP_RXCF TS_MIN_IF TS_MIN_IF TS_MIN_IF TS_MIN_IF ACC_UDP ACC_CRC TS_APPEN TS_INSER PTP_DOM PTP_DOM PTP_DOMAI PTP_DOM PTP_DOMAI PTP_DOM PTP_DOMAI PTP_DOM
Configuration G3 G G G G D T AIN AIN N AIN N AIN N AIN
Register 3
PTP Receive 1Dh PTP_RXCF IPV4_UDP TS_SEC_E TS_SEC_L TS_SEC_L RXTS_NS_ RXTS_NS_ RXTS_NS_ RXTS_NS_ RXTS_NS_ RXTS_NS_ RXTS_SEC_ RXTS_SE RXTS_SEC_ RXTS_SE RXTS_SEC_ RXTS_SE
Configuration G4 _MOD N EN EN OFF OFF OFF OFF OFF OFF OFF C_OFF OFF C_OFF OFF C_OFF
Register 4
PTP Temporary 1Eh PTP_TRDL PTP_TR_D PTP_TR_D PTP_TR_D PTP_TR_D PTP_TR_D PTP_TR_D PTP_TR_D PTP_TR_D PTP_TR_D PTP_TR_D PTP_TR_DU PTP_TR_D PTP_TR_DU PTP_TR_D PTP_TR_DU PTP_TR_D
Rate Duration Low URL URL URL URL URL URL URL URL URL URL RL URL RL URL RL URL
Register
PTP Temporary 1Fh PTP_TRD Reserved Reserved Reserved Reserved Reserved Reserved PTP_TR_D PTP_TR_D PTP_TR_D PTP_TR_D PTP_TR_DU PTP_TR_D PTP_TR_DU PTP_TR_D PTP_TR_DU PTP_TR_D
Rate Duration High H URH URH URH URH RH URH RH URH RH URH
Register
PTP 1588 CONFIGURATION REGISTERS - PAGE 6
PTP Clock Output 14h PTP_COC PTP_CLKO PTP_CLKO PTP_CLKO Reserved Reserved Reserved Reserved Reserved PTP_CLKD PTP_CLKD PTP_CLKDIV PTP_CLKD PTP_CLKDIV PTP_CLKD PTP_CLKDIV PTP_CLKD
Control Register UT EN UT SEL UT IV IV IV IV IV
SPEEDSE
L
PHY Status Frame 15h PSF_CFG1 PTPRESE PTPRESE PTPRESE PTPRESE VERSIONP VERSIONP VERSIONP VERSIONP TRANSPO TRANSPO TRANSPORT TRANSPO MESSAGETY MESSAGE MESSAGETY MESSAGE
Configuration RVED RVED RVED RVED TP TP TP TP RTSPECIFI RTSPECIFI SPECIFIC RTSPECIFI PE TYPE PE TYPE
Register 1 C C C
Status Frame 16h PSF_CFG2 IP_SA_BY IP_SA_BY IP_SA_BY IP_SA_BY IP_SA_BY IP_SA_BY IP_SA_BY IP_SA_BY IP_SA_BY IP_SA_BY IP_SA_BYTE IP_SA_BY IP_SA_BYTE IP_SA_BY IP_SA_BYTE IP_SA_BY
Configuration TE1 TE1 TE1 TE1 TE1 TE1 TE1 TE1 TE0 TE0 0 TE0 0 TE0 0 TE0
Register 2
Status Frame 17h PSF_CFG3 IP_SA_BY IP_SA_BY IP_SA_BY IP_SA_BY IP_SA_BY IP_SA_BY IP_SA_BY IP_SA_BY IP_SA_BY IP_SA_BY IP_SA_BYTE IP_SA_BY IP_SA_BYTE IP_SA_BY IP_SA_BYTE IP_SA_BY
Configuration TE3 TE3 TE3 TE3 TE3 TE3 TE3 TE3 TE2 TE2 2 TE2 2 TE2 2 TE2
Register 3
Status Frame 18h PSF_CFG4 IP_CHKSU IP_CHKSU IP_CHKSU IP_CHKSU IP_CHKSU IP_CHKSU IP_CHKSU IP_CHKSU IP_CHKSU IP_CHKSU IP_CHKSUM IP_CHKSU IP_CHKSUM IP_CHKSU IP_CHKSUM IP_CHKSU
Configuration M M M M M M M M M M M M M
Register 4
PTP SFD 19h PTP_SFDC Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved TX_SFD_G TX_SFD_G TX_SFD_GPI TX_SFD_G RX_SFD_GPI RX_SFD_ RX_SFD_GPI RX_SFD_
Congiguration FG PIO PIO O PIO O GPIO O GPIO
Register
PTP Interrupt 1Ah PTP_INTC Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved PTP_INT_GP PTP_INT_ PTP_INT_GP PTP_INT_
Control Register TL IO GPIO IO GPIO
PTP Clock Source 1Bh PTP_CLKS CLK_SRC CLK_SRC Reserved Reserved Reserved Reserved Reserved Reserved Reserved CLK_SRC_ CLK_SRC_P CLK_SRC_ CLK_SRC_P CLK_SRC_ CLK_SRC_P CLK_SRC_
Register RC PER ER PER ER PER ER PER
PTP Ethernet Type 1Ch PTP_ETR PTP_ETYP PTP_ETYP PTP_ETYP PTP_ETYP PTP_ETYP PTP_ETYP PTP_ETYP PTP_ETYP PTP_ETYP PTP_ETYP PTP_ETYPE PTP_ETYP PTP_ETYPE PTP_ETYP PTP_ETYPE PTP_ETYP
Register E E E E E E E E E E E E E
PTP Offset 1Dh PTP_OFF Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved PTP_OFFS PTP_OFFS PTP_OFFSE PTP_OFFS PTP_OFFSE PTP_OFFS PTP_OFFSE PTP_OFFS
Register ET ET T ET T ET T ET
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