Datasheet

DP83630
www.ti.com SNLS335B –OCTOBER 2010–REVISED APRIL 2013
Table 10-1. Register Map (continued)
Offset
Access Tag Description
Hex Decimal
1Ah 26 RO PTP_RDCKSUM PTP Page 4 Read Checksum
1Bh 27 RO PTP_WRCKSUM PTP Page 4 Write Checksum
1Ch 28 RO PTP_TXTS PTP Transmit TimeStamp Register
1Dh 29 RO PTP_RXTS PTP Receive TimeStamp Register
1Eh 30 RO PTP_ESTS PTP Event Status Register
1Fh 31 RO PTP_EDATA PTP Event Data Register
PTP 1588 Configuration Registers - Page 5
14h 20 RW PTP_TRIG PTP Trigger Configuration Register
15h 21 RW PTP_EVNT PTP Event Configuration Register
16h 22 RW PTP_TXCFG0 PTP Transmit Configuration Register 0
17h 23 RW PTP_TXCFG1 PTP Transmit Configuration Register 1
18h 24 RW PSF_CFG0 PHY Status Frames Configuration Register 0
19h 25 RW PTP_RXCFG0 PTP Receive Configuration Register 0
1Ah 26 RW PTP_RXCFG1 PTP Receive Configuration Register 1
1Bh 27 RW PTP_RXCFG2 PTP Receive Configuration Register 2
1Ch 28 RW PTP_RXCFG3 PTP Receive Configuration Register 3
1Dh 29 RW PTP_RXCFG4 PTP Receive Configuration Register 4
1Eh 30 RW PTP_TRDL PTP Temporary Rate Duration Low Register
1Fh 31 RW PTP_TRDH PTP Temporary Rate Duration High Register
PTP 1588 Configuration Registers - Page 6
14h 20 RW PTP_COC PTP Clock Output Control Register
15h 21 RW PSF_CFG1 PHY Status Frames Configuration Register 1
16h 22 RW PSF_CFG2 PHY Status Frames Configuration Register 2
17h 23 RW PSF_CFG3 PHY Status Frames Configuration Register 3
18h 24 RW PSF_CFG4 PHY Status Frames Configuration Register 4
19h 25 RW PTP_SFDCFG PTP SFD Configuration Register
1Ah 26 RW PTP_INTCTL PTP Interrupt Control Register
1Bh 27 RW PTP_CLKSRC PTP Clock Source Register
1Ch 28 RW PTP_ETR PTP Ethernet Type Register
1Dh 29 RW PTP_OFF PTP Offset Register
1Eh 30 RO PTP_GPIOMON PTP GPIO Monitor Register
1Fh 31 RW PTP_RXHASH PTP Receive Hash Register
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