Datasheet

DP83630
SNLS335B OCTOBER 2010REVISED APRIL 2013
www.ti.com
10 Register Block
Table 10-1. Register Map
Offset
Access Tag Description
Hex Decimal
00h 0 RW BMCR Basic Mode Control Register
01h 1 RO BMSR Basic Mode Status Register
02h 2 RO PHYIDR1 PHY Identifier Register #1
03h 3 RO PHYIDR2 PHY Identifier Register #2
04h 4 RW ANAR Auto-Negotiation Advertisement Register
05h 5 RW ANLPAR Auto-Negotiation Link Partner Ability Register
06h 6 RW ANER Auto-Negotiation Expansion Register
07h 7 RW ANNPTR Auto-Negotiation Next Page TX Register
08h-0Fh 8-15 RESERVED RESERVED
10h 16 RO PHYSTS PHY Status Register
11h 17 RW MICR MII Interrupt Control Register
12h 18 RW MISR MII Interrupt Status and Event Control Register
13h 19 RW PAGESEL Page Select Register
Extended Registers - Page 0
14h 20 RO FCSCR False Carrier Sense Counter Register
15h 21 RO RECR Receive Error Counter Register
16h 22 RW PCSR PCS Sub-Layer Configuration and Status Register
17h 23 RW RBR RMII and Bypass Register
18h 24 RW LEDCR LED Direct Control Register
19h 25 RW PHYCR PHY Control Register
1Ah 26 RW 10BTSCR 10Base-T Status/Control Register
1Bh 27 RW CDCTRL1 CD Test Control Register and BIST Extensions Register
1Ch 28 RW PHYCR2 PHY Control Register 2
1Dh 29 RW EDCR Energy Detect Control Register
1Eh 30 RESERVED RESERVED
1Fh 31 RW PCFCR PHY Control Frames Configuration Register
Test Registers - Page 1
14h - 1Dh 20 - 29 RESERVED RESERVED
1Eh 30 RW SD_CNFG Signal Detect Configuration
1Fh 31 RESERVED RESERVED
Link Diagnostics Registers - Page 2
14h 20 RO LEN100_DET 100 Mb Length Detect Register
15h 21 RW FREQ100 100 Mb Frequency Offset Indication Register
16h 22 RW TDR_CTRL TDR Control Register
17h 23 RW TDR_WIN TDR Window Register
18h 24 RO TDR_PEAK TDR Peak Measurement Register
19h 25 RO TDR_THR TDR Threshold Measurement Register
1Ah 26 RW VAR_CTRL Variance Control Register
1Bh 27 RO VAR_DAT Variance Data Register
1Ch 28 RESERVED RESERVED
1Dh 29 RW LQMR Link Quality Monitor Register
1Eh 30 RW LQDR Link Quality Data Register
1Fh 31 RW LQMR2 Link Quality Monitor Register 2
Reserved Registers - Page 3
14h - 1Fh 20 - 31 RESERVED RESERVED
PTP 1588 Base Registers - Page 4
14h 20 RW PTP_CTL PTP Control Register
15h 21 RW PTP_TDR PTP Time Data Register
16h 22 RW PTP_STS PTP Status Register
17h 23 RW PTP_TSTS PTP Trigger Status Register
18h 24 RW PTP_RATEL PTP Rate Low Register
19h 25 RW PTP_RATEH PTP Rate High Register
72 Register Block Copyright © 2010–2013, Texas Instruments Incorporated
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