Datasheet

1:1
1:1
RJ45
NOTE: CENTER TAP IS PULLED TO VDD
*PLACE CAPACITORS CLOSE TO THE
TRANSFORMER CENTER TAPS
RD-
RD+
TD-
TD+
0.1 PF*
0.1 PF*
COMMON MODE CHOKES
MAY BE REQUIRED
0.1 PF
0.1 PF
Vdd
Vdd
Vdd
All values are typical and are +/- 1%
49.9:
49.9:
49.9:
49.9:
PLACE RESISTORS AND
CAPACITORS CLOSE TO
THE DEVICE
TPRDM
TDRDP
TPTDM
TPTDP
T1
DP83630
SNLS335B –OCTOBER 2010–REVISED APRIL 2013 www.ti.com
9 Design Guidelines
9.1 TPI NETWORK CIRCUIT
Figure 9-1 shows the recommended circuit for a 10/100 Mb/s twisted pair interface.
Below is a partial list of recommended transformers. It is important that the user realize that variations with
PCB and component characteristics requires that the application be tested to ensure that the circuit meets
the requirements of the intended application.
Pulse H1102
Pulse H2019
Figure 9-1. 10/100 Mb/s Twisted Pair Interface
68 Design Guidelines Copyright © 2010–2013, Texas Instruments Incorporated
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