Datasheet

MII/RMII INTERFACE
10BASE -T
&
100BASE-TX
TRANSMIT BLOCK
10BASE -T
&
100BASE-TX
RECEIVE BLOCK
MANAGEMENT REGISTERS
AUTO-NEGOTIATION
REGISTERS
CLOCK
GENERATION
IEEE 1588
BOUNDARY
SCAN
AUTO-MDIX
ANALOG SIGNAL
PROCESSOR
LED
DRIVERS
DAC
ADC
JTAG TD+/- RD+/- LEDS
SYSTEM CLOCK
REFERENCE
GPIO
RX_CLK RX_DATATX_CLKTX_DATA
RX_CLK
TX_CLK
TXD[3:0]
TX_EN
MDIO
MDC
COL
CRS/CRS_DV
RX_ER
RX_DV
RXD[3:0]
SERIAL
MANAGEMENT
MII/RMII
Status
LEDs
Clock
Media Access Control
(MAC)
MII or RMII
DP83630
10/100 Mb/s
Precision PHYTER
M P U / C P U
Fiber
Transceiver
RJ
45
10BASE-T
100BASE-TX
or
100BASE-FX
IEEE 1588 clocks, events, triggers
IEEE 1588
Triggered
Events
IEEE 1588
Captured
Events
Magnetics
DP83630
www.ti.com
SNLS335B OCTOBER 2010REVISED APRIL 2013
2 Device Information
2.1 System Diagram
2.2 Block Diagram
Figure 2-1. DP83630 Functional Block Diagarm
Copyright © 2010–2013, Texas Instruments Incorporated Device Information 5
Submit Documentation Feedback
Product Folder Links: DP83630