Datasheet

Symbol
T2.30.1
T2.30.3T2.30.2
T2.30.4
X1
TXD[3:0]
TX_EN
PMD Output
Pair
Valid data
T2.29.2
CLK_OUT
T2.29.1
X1
T2.29.1
DP83630
www.ti.com SNLS335B –OCTOBER 2010–REVISED APRIL 2013
4.33 AC Specifications — CLK_OUT Timing (RMII Slave Mode)
Parameter Description Notes Min Typ Max Units
T2.29.1 CLK_OUT High/Low Time 10 ns
T2.29.2 CLK_OUT propagation delay Relative to X1 8 ns
4.34 AC Specifications — Single Clock MII (SCMII) Transmit Timing
Parameter Description Notes Min Typ Max Units
T2.30.1 X1 Clock Period 25 MHz Reference Clock 40 ns
T2.30.2 TXD[3:0], TX_EN Data Setup To X1 rising edge 4 ns
T2.30.3 TXD[3:0], TX_EN Data Hold From X1 rising edge 2 ns
T2.30.4 X1 Clock to PMD Output Pair
100BASE-TX or 100BASE-FX 13 bits
Latency (100 Mb)
(1)
(1) Latency measurement is made from the X1 rising edge to the first bit of symbol.
Copyright © 2010–2013, Texas Instruments Incorporated Electrical Specifications 35
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