Datasheet

DP83630
www.ti.com SNLS335B –OCTOBER 2010–REVISED APRIL 2013
10.7.11 PTP GPIO Monitor Register (PTP_GPIOMON), Page 6
This register provides read-only access to the current values on GPIO inputs.
Table 10-74. PTP GPIO Monitor Register (PTP_GPIOMON), address 0x1E
Bit Bit Name Default Description
15:12 RESERVED 0000, RO Reserved: Writes ignored, Read as 0
11:0 PTP_GPIO_IN 0000 0000 0000, PTP GPIO Inputs:
RO This field reflects the current values seen on the GPIO inputs. GPIOs 12 through 1
are mapped to bits 11:0 in order.
10.7.12 PTP Receive Hash Register (PTP_RXHASH), Page 6
This register provides configuration for the source identity hash filter of the PTP receive packet parser. If
enabled, the receive parse logic will deliver a receive timestamp only if the hash function on the ten octet
sourcePortIdentity field correctly matches the programmed value. The source identity hash filter does not
affect timestamp insertion.
Table 10-75. PTP Receive Hash Register (PTP_RXHASH), address 0x1F
Bit Bit Name Default Description
15:13 RESERVED 000, RO Reserved: Writes ignored, Read as 0
12 RX_HASH_EN 0, RW Receive Hash Enable:
Enables filtering of PTP messages based on the hash function on the ten octet
sourcePortIdentity field.
11:0 PTP_RX_HASH 0000 0000 0000, Receive Hash:
RW This field contains the expected source identity hash value for incoming PTP event
messages.
Copyright © 2010–2013, Texas Instruments Incorporated Register Block 129
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